Backside Thinning of D2W Hybrid-Bonded Chips for Uniform Thickness

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing methods for thinning the rear substrate of microelectronic devices attached by Die-to-Wafer (D2W) type bonding result in significant thickness dispersion, making subsequent chemical mechanical polishing (CMP) processes complex and challenging.

Innovation Solution

A method involving pre-thinning grinding of the rear substrate followed by rectification etching using wet chemical means, with selective stop elements to achieve uniform thinning, is proposed. This method includes the formation of protective layers to prevent contamination and damage during the thinning process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional grinding methods are used for thinning the rear substrate of individual chips after D2W bonding, then the thinning process can be performed, but significant thickness dispersion occurs making subsequent CMP processes complex and challenging

Engineering Contradiction:
Improvethickness uniformityVSAvoidCMP process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing a first protective layer formation and pre-thinning grinding before the main thinning process. This preparatory step establishes a controlled foundation that prevents contamination during subsequent operations and enables more precise thickness control in the main thinning process, thereby reducing thickness dispersion and simplifying the overall manufacturing process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The thinning process is segmented into multiple distinct steps: pre-thinning grinding, main thinning with wet chemical etching, and intermediate protective layer formation. This segmentation allows each step to be optimized independently - the pre-thinning removes bulk material while the controlled chemical etching provides precise thickness control, resulting in reduced thickness dispersion and simplified CMP requirements

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If thinning processes are performed on individual chips attached by D2W bonding, then the substrate thickness is reduced, but contamination and damage to the bonding interface may occur

Engineering Contradiction:
Improvesubstrate thickness controlVSAvoidbonding interface integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies beforehand cushioning by forming a first protective layer on the bonding interface before performing any thinning operations. This protective layer acts as a cushion that prevents contamination and damage during the pre-thinning grinding and main thinning processes. The protective layer is designed to be removed or integrated in subsequent steps, but its temporary presence ensures bonding interface integrity throughout the thinning process

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The protective layer serves as an intermediary between the thinning process and the bonding interface. It mediates the interaction by providing a protective barrier during material removal operations, allowing the thinning process to proceed without directly exposing the bonding interface to contaminants or mechanical damage. This intermediary layer can be formed, processed, and removed in a controlled manner

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces the thickness dispersion of the microelectronic devices, allowing for improved CMP processes and ensuring the integrity of the bonding interface, thereby enhancing the quality and reliability of the 3D assembled microelectronic devices.

Implementation Method 1

a rectification etching of the height of the rear substrate of each of the individual chips attached to the handle plate, carried out by wet chemical means of said substrates

Methodology Applied
Scientific EffectWet chemical etching:

Implementation Method 2

said wet chemical etching being selective with respect to a stop element contained in the substrates

Methodology Applied
Scientific EffectSelective etching:

Implementation Method 3

a pre-thinning grinding of the rear substrate of the individual chips attached to the handle plate

Methodology Applied
Scientific EffectGrinding: Abrasion

Data Source

PatentEP4568452A1Backside thinning protocol for single die add-on chips using die-to-waer hybrid bonding
Publication Date: 2025.06.11 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • EP4568452A1 patent drawingFigure 1A~3
  • EP4568452A1 patent drawingFigure 4
  • EP4568452A1 patent drawingFigure 5A~5B

AI summary

A method for producing a microelectronic device by hybrid bonding of individual chips on a handle plate, of the Die-to-Wafer (D2W) type, comprises a protocol for thinning the rear substrate of the chips. The protocol comprises a pre-thinning grinding (62), carried out for example by chemical mechanical polishing, of the rear substrate of the individual chips once attached to the plate. This grinding is preceded by the formation (61) of a protective layer of the trenches formed by the spaces between the individual added chips, which are not affected by the thinning. Then comes a rectification etching (67) of the height of the rear substrate of each of the individual added chips, carried out by wet chemical means, making it possible to eliminate the TTV ("Total Thickness Variation").This etching is selective with respect to a stop element contained in the respective substrates of the added chips, and which is used to stop the etching at a substantially uniform level for each of the chips.