Backside Deep Trench Capacitor Interconnect for Logic Power Delivery
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor technologies face challenges in connecting backside deep trench capacitors effectively to transistor source/drain regions and backside BEOL structures, limiting the potential benefits of backside power delivery such as increased logic density and improved performance.
Innovation Solution
A semiconductor device is designed with a backside deep trench capacitor electrically connected to a source/drain region of a transistor through a combination of backside via contact, frontside power via, and frontside power via-to-source/drain contact structures, with additional connections to the backside BEOL structure via last level backside power vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If backside deep trench capacitor is implemented, then logic density and chip performance are improved, but connection complexity between capacitor and transistor increases
Solution Approach 1:
The patent moves the deep trench capacitor from the traditional frontside to the backside of the semiconductor device, utilizing the third dimension (vertical stacking) to resolve the contradiction. This dimensional change allows the capacitor to be positioned beneath the transistor, enabling backside power delivery while maintaining compact footprint and improving logic density without proportionally increasing connection complexity.
Solution Approach 2:
The connection path is segmented into multiple distinct components: backside via contact structure, frontside power via structure, and frontside power via structure-to-source/drain contact structure. This segmentation allows each component to be optimized independently and simplifies the overall connection architecture by breaking down the complex interconnection into manageable segments.
2Reliability
If backside deep trench capacitor is implemented, then signal integrity is improved, but manufacturing process complexity increases
Solution Approach 1:
The backside via contact structure is formed and positioned before final capacitor assembly, and the frontside power via structures are prepared in advance during frontside processing. These preliminary actions enable the capacitor to be connected to the transistor source/drain regions through pre-established connection paths, reducing manufacturing complexity despite the novel backside configuration.
3Reliability
If multiple via structures are used for connection, then electrical connection reliability is improved, but device structure complexity increases
Solution Approach 1:
The frontside power via structure serves multiple functions: it provides electrical connection from the backside via contact structure, connects to the source/drain region of the transistor, and integrates with the frontside BEOL structure. This multi-functionality reduces the need for separate dedicated connection structures, thereby improving electrical connection reliability while limiting the increase in device structure complexity.
Data Source
AI summary
A semiconductor device is provided including a backside deep trench capacitor present in a deep trench device region and electrically connected to a source/drain region of a transistor and to a backside back-end-of-the-line (BEOL) structure. In some embodiments, the semiconductor device can also include a logic device region including at least one logic transistor that is located adjacent to the deep trench device region.