Backside Trench Gate Tie-Down for Smaller Logic Cells
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Solution Overview
Problem
Conventional gate-tie-down (GTD) schemes in integrated circuit technology face challenges with scaling, requiring wider power rails and larger logic cells due to frontside power designs, which hinder miniaturization and increase complexity.
Innovation Solution
The implementation of a trench-tie-down (TDD) scheme with backside power architecture, where a conductive backside power trench applies turn-off voltage to edge gates through a backside power rail, enabling ultra-low height standard cells and higher area scaling while maintaining electrical isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If conventional frontside power GTD schemes are used, then electrical isolation is achieved, but power rail width and logic cell size increase
Solution Approach 1:
The patent inverts the conventional frontside power architecture by moving the power rail to the backside of the substrate. This inversion allows the power rail to be positioned beneath the channel ribbon while still achieving electrical isolation through the gate-tie-down mechanism, thereby reducing the required logic cell area without compromising isolation reliability
Solution Approach 2:
The patent transitions from a planar frontside power configuration to a three-dimensional backside power configuration. By extending the power rail into the vertical dimension (below the channel ribbon) and using the conductive trench to connect it to the gate, the design achieves electrical isolation while minimizing the footprint on the device surface
2Productivity
If frontside power design is used, then GTD implementation is straightforward, but area scaling is limited
Solution Approach 1:
The patent segments the power delivery function into two distinct components: a backside power rail for power delivery and a conductive trench for electrical connection to the gate. This segmentation allows independent optimization of each component, enabling better area scaling while managing the overall system complexity
Solution Approach 2:
The conductive trench acts as an intermediary element that bridges the backside power rail and the gate structure. This intermediary allows the power rail to be positioned on the backside while still achieving the necessary electrical connection, thereby enabling area scaling without excessive complexity in the power architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for smaller cell sizes, improved area scaling, and enhanced performance and power efficiency by eliminating the need for physical diffusion breaks and reducing parametric variation.
Implementation Method 1
The BSP trench may be conductive and electrically coupled with the BSP rail and with the first and second edge gates. The BSP rail may be configured to apply the turn-off voltage to the first and second edge gates through the BSP trench.
Data Source
AI summary
Disclosed are gate-tie-down (GTD) cells that utilize a backside power delivery scheme, where metal wires that deliver power are provided on the back of the wafer. As a result, ultra-low height standard cell can be enabled. Also higher area scaling may be achieved. Further, performance and power gain can be maximized.