Backside Deep Trench Isolation for Image Sensor Leakage Paths

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current image sensors face issues with current leakage paths due to blanket deep N-doped wells, leading to high power consumption during standby mode, especially in small pixel designs where these paths can create unnecessary power usage.

Innovation Solution

Incorporating a backside deep trench isolation (DTI) structure region between devices and the guard ring region in the pixel array substrate to block current leakage paths, while maintaining a blanket deep N-doped well for maximizing full well capacity without complex manufacturing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If blanket deep N-doped wells are used to maximize pixel full well capacity, then photosensitivity and charge storage are improved, but current leakage paths form between peripheral devices and guard ring region

Engineering Contradiction:
Improvefull well capacityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent segments the continuous blanket deep N-doped well into isolated sub-doped well portions by introducing deep trench isolation structures. These trenches physically divide the N-doped region, creating electrically isolated segments that prevent current leakage paths while preserving the charge storage capacity of each pixel's photodiode.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The deep trench isolation structures serve as intermediary elements between the peripheral devices and the guard ring region. These trenches, filled with dielectric material, act as electrical barriers that block current leakage paths without interfering with the photosensitive function of the pixels.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of energy

If deep trench isolation structures are introduced to block current leakage, then power consumption is reduced, but device complexity and manufacturing steps increase

Engineering Contradiction:
Improvepower consumptionVSAvoidstructure complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent merges the deep trench isolation structures with the existing blanket deep N-doped well formation process. By combining these functions into a single integrated structure, the patent reduces the need for separate isolation steps while achieving both charge storage and leakage prevention objectives.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The DTI structure effectively reduces or prevents current leakage, thereby minimizing power consumption during low power modes and enhancing the overall efficiency of the imaging system.

Implementation Method 1

a backside deep trench isolation (BDTI) structure disposed between the guard ring region and the at least one device and proximate to the backside of the semiconductor substrate. The BDTI structure is configured to block current leakage paths

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS20240387567A1Backside deep trench isolation structure for leakage suppression
Publication Date: 2024.11.21 OMNIVISION TECHNOLOGIES INC
  • US20240387567A1 patent drawing
  • US20240387567A1 patent drawing
  • US20240387567A1 patent drawing

AI summary

A pixel array substrate includes a semiconductor substrate including a pixel array, a first side, and a second side opposite the first side, a guard ring region in the semiconductor substrate, formed of a doped semiconductor, enclosing the pixel array, and extending into the semiconductor substrate from the first side, and a peripheral region in the semiconductor substrate and enclosing the guard ring region. The peripheral region includes at least one device and a deep trench isolation (DTI) structure region disposed between the guard ring region and the at least one device and proximate to the second side of the semiconductor substrate. The DTI structure region is configured to block an electric current path between a P-N junction in the guard ring region and the at least one device.