Backside TSV Interconnects for High-Q Acoustic Wave Packages
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Solution Overview
Problem
Acoustic wave devices, such as SAW filters, face challenges with energy loss and reduced quality factor (Q) due to long electrical paths and thermal conductivity issues, which affect performance and size constraints in wireless communication devices.
Innovation Solution
The implementation of through-substrate vias (TSVs) for backside interconnection and the integration of metal-insulator-metal (MIM) capacitors on the substrate reduce electrical path lengths and thermal conductivity, minimizing energy loss and package size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional wire and interconnect paths are used to connect electrodes to capacitors, then electrical connection is achieved, but electrical path length increases causing energy loss and reduced Q factor
Solution Approach 1:
The patent transitions from planar surface connections to three-dimensional vertical connections by drilling through-substrate vias (TSVs) through the substrate thickness. This dimensional change allows electrical connections to pass through the substrate volume rather than traveling along the surface, dramatically reducing the electrical path length between electrodes and capacitors and thereby reducing energy loss.
Solution Approach 2:
Instead of connecting components on the same surface level, the patent inverts the connection approach by passing vias through the substrate from one surface to the other. This allows capacitors to be positioned on the backside of the substrate, creating direct vertical electrical paths that eliminate the need for long wire traces and reduce energy loss.
2Area of stationary object
If bulk components are mounted on package substrate, then electrical connection is achieved, but package height and area increase
Solution Approach 1:
The patent merges the capacitor component with the substrate structure by fabricating capacitors directly on the backside of the substrate using the same semiconductor processing steps. This integration eliminates the need for separate bulk capacitors and their mounting structures, reducing package area and simplifying the overall device structure.
Solution Approach 2:
The patent embeds capacitors within the substrate structure itself, nesting the capacitor fabrication process within the substrate manufacturing flow. Capacitors are formed as integrated structures on the substrate backside, eliminating external mounting requirements and reducing package complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the quality factor (Q) of acoustic wave devices, improves heat dissipation, and reduces the overall package height and area, leading to more efficient and compact wireless communication devices.
Implementation Method 1
the electrical path between the electrodes and the capacitor extend through the wires on the piezoelectric material, the interconnects (such as solder balls), wires on the package substrate, and interconnects from the package substrate to the capacitor
Implementation Method 2
a thermal conductive path is also reduced for improved heat dissipation
Implementation Method 3
Surface acoustic wave (SAW) filters that include interdigitated electrodes on a surface of a piezoelectric material, such as lithium niobate (LN) or lithium tantalate (LT)
Data Source
AI summary
A package includes a device that includes electrodes disposed on a piezoelectric layer on a first, front side of a first substrate and vertical interconnect accesses (vias) that extend through the substrate to couple the electrodes to a second, back side of the first substrate. The vias may be through-substrate vias (TSVs). Employing a first substrate (e.g., silicon) in which vias can be formed, the electrodes on the front side can be coupled to interconnects on the back side to minimize electrical path distances to and from the device for a higher a Q factor. Also, a capacitor may be formed on a second, back side of the substrate and coupled to an electrode of the device by a via rather than having an electrical path from a first substrate, to an external capacitor on a package substrate. A thermal conductive path is also reduced for improved heat dissipation.