Backside TSV Guard Ring Structure for Low-Parasitic Interconnects
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Solution Overview
Problem
Existing through vias in semiconductor devices face challenges in forming backside interconnect structures with reduced resistance and parasitic capacitance, leading to increased voltage drop, power consumption, and signal integrity issues as integrated circuits scale down.
Innovation Solution
A through-silicon via structure with a combined guard ring that includes a combination of frontside and backside features, which are compatible with semiconductor fabrication, incorporating a guard ring to protect and stabilize the TSV, reduce noise, and enhance signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing through via structures are used to connect stacked ICs, then interconnectivity between ICs is achieved, but resistance and parasitic capacitance increase leading to voltage drop and signal integrity issues
Solution Approach 1:
The through via structure is segmented into multiple components: a via body extending through the substrate, a first guard ring structure surrounding a portion of the via, and a second guard ring structure surrounding another portion. This segmentation allows each component to be optimized independently for reducing parasitic effects and improving signal integrity while maintaining interconnectivity.
Solution Approach 2:
Guard ring structures are introduced as intermediary elements between the via and surrounding circuitry. These guard rings act as shielding structures that reduce parasitic capacitance and electromagnetic coupling, thereby improving signal integrity and reducing voltage drop without compromising the via's interconnection function.
2Productivity
If feature size is decreased to increase functional density, then more devices can be integrated per chip area, but resistance and parasitic effects in through vias increase
Solution Approach 1:
The guard ring structures are strategically positioned at specific locations around the via (first guard ring at one portion, second guard ring at another portion) rather than uniformly throughout. This local quality approach optimizes the reduction of parasitic effects at critical interfaces while maintaining high functional density in other areas of the chip.
3Device complexity
If through vias are made smaller to fit more interconnects, then interconnect density increases, but structural stability and noise immunity decrease
Solution Approach 1:
The guard ring structures are formed in advance during the fabrication process, before final via completion and device assembly. This preliminary action ensures that the stabilizing and noise-shielding structures are already in place to protect the small-diameter via from structural instability and electromagnetic noise, enabling higher interconnect density without sacrificing reliability.
Data Source
AI summary
A semiconductor structure includes a device layer including a plurality of transistors, a frontside interconnect structure disposed on a frontside of the device layer, a backside interconnect structure disposed under a backside of the device layer, a through via extending through the device layer, and a guard ring. The through via has a first portion in the frontside interconnect structure and a second portion in the backside interconnect structure. The guard has a first portion in the frontside interconnect structure and a second portion in the backside interconnect structure. The first portion of the guard ring surrounds the first portion of the through via, the second portion of the guard ring surrounds the second portion of the through via.