Backside TSV Shield Structure Using a PN Junction Barrier
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Solution Overview
Problem
The semiconductor manufacturing process faces challenges in shrinking minimum feature sizes due to charge migration issues caused by plasma etching during the formation of through substrate vias (TSVs), which can trap charge in shallow trench isolation structures, affecting the operating parameters of semiconductor devices.
Innovation Solution
A shield structure comprising a PN junction extending completely through the substrate and positioned between the semiconductor device and the TSV, creating a depletion region that blocks charge migration and prevents charge accumulation, thereby maintaining the operating parameters of the semiconductor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If plasma etching is used to form through substrate vias, then TSV formation is achieved, but charge migration and accumulation occur in shallow trench isolation structures
Solution Approach 1:
A shield structure comprising a PN junction is introduced as an intermediary element positioned between the TSV and the shallow trench isolation structure. The PN junction creates a depletion region that acts as a barrier to block charge migration from the TSV to the isolation structure, thereby preventing charge accumulation while allowing the plasma etching process to proceed for TSV formation
2Productivity
If minimum feature size is shrunk to improve processing capabilities, then IC performance improves, but charge migration issues worsen
Solution Approach 1:
The shield structure segments the interaction path between the TSV and the shallow trench isolation structure by introducing a PN junction with a depletion region. This segmentation creates an electrical barrier that blocks charge migration pathways, allowing continued miniaturization of IC features while preventing charge accumulation issues that would otherwise worsen with smaller dimensions
3Object-affected harmful factors
If shield structure with PN junction is added to block charge migration, then charge accumulation is prevented, but device complexity increases
Solution Approach 1:
The shield structure utilizes changes in electrical parameters through the PN junction's depletion region to block charge migration. By leveraging the inherent electrical properties of the PN junction and its depletion width, the structure prevents charge accumulation without requiring additional complex materials or multi-layer configurations, thus limiting the increase in device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The PN junction effectively prevents charge migration and accumulation, minimizing the impact of plasma etching on semiconductor device performance, particularly in HV NMOS devices, and enhancing manufacturing yields by maintaining saturation current and other operating parameters within specifications.
Implementation Method 1
creating a depletion region that blocks charge migration and prevents charge accumulation
Data Source
AI summary
Various embodiments of the present application are directed towards an integrated circuit (IC) in which a shield structure blocks the migration of charge to a semiconductor device from proximate a through substrate via (TSV). In some embodiments, the IC comprises a substrate, an interconnect structure, the semiconductor device, the TSV, and the shield structure. The interconnect structure is on a frontside of the substrate and comprises a wire. The semiconductor device is on the frontside of the substrate, between the substrate and the interconnect structure. The TSV extends completely through the substrate, from a backside of the substrate to the wire, and comprises metal. The shield structure comprises a PN junction extending completely through the substrate and directly between the semiconductor device and the TSV.