Backside UBM Pad and Plane Structure for Semiconductor Package
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Solution Overview
Problem
Conventional semiconductor devices with embedded ground or power planes on redistribution layers have high formation costs due to complex processes.
Innovation Solution
A semiconductor device design featuring a semiconductor substrate with first and second conductive vias, backside dielectric layers, and UBM pads and planes, where the UBM pads and planes are positioned on the outermost layer, reducing formation costs while maintaining electrical integrity through a gap structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ground plane or power plane is formed on redistribution layer embedded in dielectric layers, then electrical performance (signal integrity and power integrity) is maintained, but manufacturing cost increases due to complex processes
Solution Approach 1:
The patent moves the ground plane and power plane from the conventional embedded position within dielectric layers to the backside surface of the semiconductor substrate. This dimensional relocation eliminates the need for complex embedding processes while maintaining electrical performance through direct connection to conductive vias.
Solution Approach 2:
The ground plane and power plane are extracted from the complex multi-layer dielectric structure and placed on the outermost backside surface. This extraction simplifies the manufacturing process by removing the need to embed planes within dielectric layers, while UBM layers and gaps are added to maintain electrical integrity.
2Ease of manufacture
If UBM pads and UBM plane are positioned on outermost layer, then manufacturing cost is reduced, but electrical connectivity must be maintained
Solution Approach 1:
Conductive vias serve as intermediaries connecting the UBM pads and UBM plane on the backside surface to the front surface circuitry. The via structure with liner and conductive fill material ensures reliable electrical connectivity while allowing the UBM structures to be positioned on the outermost layer for simplified manufacturing.
Solution Approach 2:
The UBM structure employs composite material layers including UBM layers, gap fill dielectric material, and conductive via materials. This composite approach enables the UBM pads and plane to be formed on the backside surface while maintaining electrical connectivity through the via structures that penetrate the substrate.
Data Source
AI summary
The present invention relates to a semiconductor device and a semiconductor package having the same. The semiconductor device includes a semiconductor substrate, a backside dielectric layer, a plurality of first backside under ball metal (UBM) pads and a first backside UBM plane. The backside dielectric layer is disposed adjacent to a backside surface of the semiconductor substrate. The first backside UBM pads are disposed on the backside dielectric layer. The first backside UBM plane is disposed on the backside dielectric layer, and has a plurality of through holes. The first backside UBM pads are located within the through holes, and a gap is between the first backside UBM plane and the first backside UBM pads. Whereby, the cost for forming the first backside UBM pads and the first backside UBM plane is relatively low.