Backside Via IC Structure With Epitaxial Regrowth for Low-Resistance Routing
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Solution Overview
Problem
In the semiconductor industry, as technology advances to nanometer process nodes, challenges arise in fabricating transistors with effective gate control over all sides of the channel region, particularly due to the uncontrolled bottom side of fin FETs and the need for improved electrostatic control in GAA transistors.
Innovation Solution
The integration of a gate-all-around (GAA) transistor structure with backside vias and an epitaxial regrowth layer on the backside of source epitaxial structures, which allows for better quality epitaxial growth and reduced contact resistance, enhancing electrical connections and routing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a Fin FET structure is used to increase device density, then manufacturing efficiency is improved, but gate control over the channel region deteriorates due to the uncontrolled bottom side
Solution Approach 1:
The patent transitions from planar gate control to three-dimensional gate-all-around control by wrapping the gate electrode around the channel region in multiple dimensions, enabling control from top, bottom, and side surfaces simultaneously
Solution Approach 2:
The gate electrode is nested around the channel region in a concentric arrangement, with the gate surrounding the channel on all sides including the bottom, creating a gate-all-around structure that provides comprehensive control
2Reliability
If GAA FET structure is used to improve electrostatic control, then gate control is improved, but device complexity increases
Solution Approach 1:
The device is segmented into distinct functional regions including channel region, gate electrode, source region, drain region, and interlayer dielectric layers, allowing independent optimization of each component while maintaining overall simplicity
Solution Approach 2:
The gate electrode serves multiple functions simultaneously: controlling the channel from top, bottom, and sides; providing electrical isolation; and enabling scalable integration with standard CMOS processes
3Productivity
If backside vias are added to improve routing density, then routing efficiency is improved, but manufacturing complexity increases
Solution Approach 1:
The patent utilizes the backside dimension of the substrate for via formation, allowing routing connections to be established from the rear surface without interfering with front-side device fabrication, effectively adding a third dimension to the routing architecture
Solution Approach 2:
The backside via structure acts as an intermediary element that connects front-side devices to back-side interconnect layers, enabling complex routing while maintaining process simplicity through staged fabrication
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves electrostatic control over the channel region, reduces leakage currents, and increases routing density by providing more space for interconnections on the integrated circuit, thus addressing the limitations of traditional transistor designs.
Implementation Method 1
an epitaxial regrowth layer on the backside of source epitaxial structures, which allows for better quality epitaxial growth
Data Source
AI summary
An integrated circuit (IC) structure includes a gate structure, a source epitaxial structure, a drain epitaxial structure, a front-side interconnection structure, a backside dielectric layer, an epitaxial regrowth layer, and a backside via. The source epitaxial structure and the drain epitaxial structure are respectively on opposite sides of the gate structure. The front-side interconnection structure is over a front-side of the source epitaxial structure and a front-side of the drain epitaxial structure. The backside dielectric layer is over a backside of the source epitaxial structure and a backside of the drain epitaxial structure. The epitaxial regrowth layer is on the backside of a first one of the source epitaxial structure and the drain epitaxial structure. The backside via extends through the backside dielectric layer and overlaps the epitaxial regrowth layer.