Backside Via Contact Layout for Short-Circuit-Resistant IC Wiring
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Solution Overview
Problem
As integrated circuit devices are downscaled, there is a need for a stable and optimized wiring structure to prevent unintended short-circuits between conductive regions, which existing technologies fail to address effectively due to reduced insulating distances in compact areas.
Innovation Solution
The integration of a backside insulating structure with an etch stop pattern, overlapping gate lines, and a stepped backside via contact with varying widths, utilizing different materials for the etch stop and outer insulating patterns to maintain sufficient insulating distances and prevent short-circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If integrated circuit devices are downscaled to reduce area, then area is reduced, but insulating distance between conductive regions decreases leading to short-circuit risk
Solution Approach 1:
The patent introduces a stepped portion in the backside via contact that creates a horizontal offset at a specific vertical level. This dimensional change allows the via contact to maintain vertical electrical connection while achieving horizontal separation from gate lines, thus preserving insulating distance in the horizontal plane without increasing overall device area.
Solution Approach 2:
The etch stop pattern serves as an intermediary layer between the backside via contact and the gate lines. It provides a physical barrier and insulation layer that prevents direct contact between conductive regions, ensuring adequate insulating distance while allowing the via contact to pass through the insulating structure to reach the source/drain region.
2Productivity
If wiring structures are arranged in compact areas to improve integration, then integration is improved, but likelihood of unintended short-circuit increases
Solution Approach 1:
The backside via contact is segmented into multiple portions with different horizontal positions at different vertical levels. The first portion is horizontally separated from the gate line at the second vertical level, creating segmented electrical connection paths that reduce short-circuit risk while maintaining compact wiring arrangement for improved integration.
Solution Approach 2:
The patent applies different horizontal positioning characteristics to different portions of the backside via contact. The stepped portion creates a local change in horizontal position at the second vertical level, providing enhanced insulation where needed while maintaining vertical connectivity, thus preventing short-circuits in compact integrated wiring structures.
3Productivity
If backside via contact width is reduced to increase wiring density, then wiring density is increased, but insulating distance from gate lines decreases
Solution Approach 1:
Instead of reducing via contact width, the patent shifts the via contact horizontally at a specific vertical level using the stepped portion. This creates a horizontal offset that increases insulating distance from gate lines without reducing the via contact's vertical connectivity or overall wiring density, solving the contradiction through dimensional repositioning rather than size reduction.
Data Source
AI summary
An integrated circuit device includes a backside insulating structure including an etch stop pattern, gate lines arranged over the backside insulating structure and each overlapping the etch stop pattern in a vertical direction, source/drain regions respectively arranged one-by-one between the gate lines, and a backside via contact passing through the etch stop pattern in the vertical direction and connected to a first source/drain region selected from the source/drain regions, wherein the backside via contact includes a stepped portion, which is apart from a first vertical level in the vertical direction by as much as a first distance and has a change in the width of the backside via contact in a horizontal direction at a second vertical level that is adjacent to the etch stop pattern, the first vertical level being closest to the plurality of gate lines in the backside insulating structure.