Backside Voltage Domain Layout for Area-Efficient Semiconductor Cells

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Solution Overview

Problem

The area overhead of always-on cells in semiconductor devices is a challenge due to the introduction of additional voltage domains, which occupy space and increase the size of the cells, necessitating more efficient use of the available substrate area.

Innovation Solution

The solution involves distributing voltage domains like TVDD and VSS on the backside of the substrate, using backside vias to connect these domains to the front side, allowing for more efficient placement of functional circuit elements between the conductive elements, and merging cells to reduce area overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If voltage domains are distributed on the front side of the substrate, then power supply functionality is achieved, but the separation distance requirements increase the cell area

Engineering Contradiction:
Improvepower supply functionalityVSAvoidcell area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies dimensionality change by moving the power supply voltage domains from the front side to the backside of the substrate. This spatial relocation eliminates the need for large separation distances between voltage domains on the front side, as the backside provides additional routing space. The conductive elements are now distributed on the backside and connected to the front side through vias, allowing functional circuit elements to be placed more efficiently on the front side without being constrained by power supply separation requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If additional voltage domains are introduced for always-on cells, then power supply capabilities are enhanced, but the substrate area is consumed

Engineering Contradiction:
Improvepower supply capabilitiesVSAvoidsubstrate area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent resolves this contradiction by utilizing the backside of the substrate as an additional dimension for voltage domain distribution. This allows multiple voltage domains (TVDD, VSS, etc.) to be routed on the backside without consuming front-side substrate area, thereby maintaining enhanced power supply capabilities while preserving valuable front-side area for functional circuit elements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent creates a copy of the power supply infrastructure on the backside of the substrate. Instead of implementing all power supply functions on the front side, the voltage domains are replicated and distributed on the backside, connected to the front side through vias. This copying approach allows the front side to focus on functional elements while the backside handles power distribution, reducing overall area consumption.

Inventive Principle:
Principle #26Copying

3Reliability

If separation distance between voltage domains is increased, then electrical isolation is improved, but the placement flexibility of functional circuit elements is reduced

Engineering Contradiction:
Improveelectrical isolationVSAvoidplacement flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent resolves this contradiction by relocating voltage domain distribution to the backside of the substrate. This spatial separation allows electrical isolation to be maintained through the substrate thickness and backside routing, while the front side gains placement flexibility for functional circuit elements. The vias providing vertical connections maintain electrical isolation while enabling flexible front-side design.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250221050A1Methods related to forming semiconductor devices
Publication Date: 2025.07.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250221050A1 patent drawing
  • US20250221050A1 patent drawing
  • US20250221050A1 patent drawing

AI summary

A method includes: providing a cell of a first group that supplies a first potential from a backside of a substrate, multiple cells of a second group, and two cells of a third group that supply a second potential from the backside; determining a distance in a row direction between the cell of the first group and each of the two cells of the third group; determining a placement of the cell of the first group, the two cells of the third group, and each of the cells of the second group; and counting a number of pins of the cells of the second group. The cell of the first group is located between the two cells of the third group. Each of the cells of the second group is located between the two cells of the third group.