Backside Voltage Routing for GAA Isolation Transistor Cells
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Solution Overview
Problem
As integrated circuit technologies progress towards smaller technology nodes, gate-all-around (GAA) transistors face challenges with VDD and VSS power routing, which consumes excessive routing resources, impacting cell scaling and performance.
Innovation Solution
The implementation of circuit cells with continuous active areas, where source/drain features and channels of functional transistors are connected with those of isolation transistors, along with voltage lines under both types of transistors, reduces routing complexity and improves cell performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional separate routing for functional transistors and isolation transistors is used, then routing is simpler, but routing resources are excessive and cell scaling is impacted
Solution Approach 1:
The patent merges the routing of functional transistors and isolation transistors by implementing a shared voltage line structure where both transistor types connect to the same voltage line through respective contact structures, eliminating the need for separate routing paths and reducing overall routing complexity
Solution Approach 2:
The voltage line is designed to serve multiple functions simultaneously: it provides voltage supply to both functional transistors and isolation transistors, acts as a common electrical connection for different device types, and reduces the total number of routing resources required in the circuit cell
2Reliability
If continuous active areas are implemented connecting functional and isolation transistors, then transistor performance is enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The patent implements preliminary action by forming the continuous active area structure and voltage line configuration during the fabrication process before final device operation, ensuring proper electrical connectivity and performance characteristics are established during manufacturing
Solution Approach 2:
The voltage line acts as an intermediary element that connects both functional and isolation transistors through contact structures, facilitating proper electrical connectivity and enabling the continuous active area configuration to achieve enhanced transistor performance
3Power
If more routing resources are allocated for VDD and VSS power routing, then power delivery is improved, but cell scaling and density are reduced
Solution Approach 1:
The patent combines the power routing for VDD and VSS into a shared voltage line infrastructure where both functional and isolation transistors draw power from the same routing resources, significantly reducing the total area required for power distribution while maintaining adequate power delivery capability
Solution Approach 2:
The patent utilizes vertical dimensionality by implementing contact structures that extend through dielectric layers to reach the voltage line, allowing three-dimensional power distribution that reduces planar routing area requirements while maintaining effective power delivery to all transistor types
Data Source
AI summary
A semiconductor device includes circuit cells, isolation transistors at cell boundaries of the circuit cells, a first metal line under the isolation transistors, and connection structures connecting gate structures of the isolation transistors to the first metal line. Each of the circuit cells includes functional transistors having source/drain features and nanostructures. The isolation transistors electrically isolate the circuit cells from each other. Nanostructures of the isolation transistors, the source/drain features of the functional transistors, and the nanostructures of the functional transistors are connected with each other into a continuous rectangular shape from a top view.