Backside Connector Wafer Bonding for Thin Semiconductor Stability
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Solution Overview
Problem
Thin wafer semiconductor devices face challenges due to their instability, lack of flatness, and susceptibility to breakage and stress during processing, which can negatively affect device quality and lead to package warpage.
Innovation Solution
A method involving a device wafer with a metal layer, semiconductor substrate, and connectors, bonded to a carrier using adhesive layers that undergo partial and full curing processes, providing mechanical stability and a flat surface for subsequent processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If thin wafer semiconductor devices are used to reduce physical size, then device compactness is improved, but mechanical stability and flatness deteriorate
Solution Approach 1:
A carrier wafer is introduced as an intermediary support structure beneath the thin device wafer. The carrier wafer has the same diameter as the device wafer and provides mechanical stability and flatness during processing. The device wafer is bonded to the carrier wafer through adhesive layers, allowing the thin device wafer to maintain its compact size while the carrier wafer prevents warpage and instability.
2Volume of moving object
If thin wafer semiconductor devices are used to reduce physical size, then device compactness is improved, but susceptibility to breakage and stress worsens
Solution Approach 1:
The carrier wafer serves as a protective intermediary that distributes mechanical stresses and prevents the thin device wafer from breaking during handling and processing. The adhesive layers bond the device wafer to the carrier wafer, creating a composite structure where the carrier wafer's strength compensates for the device wafer's thinness.
Solution Approach 2:
The device wafer and carrier wafer form a composite structure bonded by adhesive layers. This composite construction combines the electrical functionality of the thin device wafer with the mechanical strength and flatness of the carrier wafer, creating a structure that is both compact and resistant to breakage.
3Device complexity
If thin wafers are unsupported during assembly, then processing simplicity is improved, but package warpage worsens
Solution Approach 1:
The carrier wafer acts as a support intermediary during the assembly process. It maintains the flatness of the device wafer and prevents package warpage by providing a stable base. The carrier wafer remains in place during bonding operations, ensuring uniform stress distribution and preventing deformation.
Solution Approach 2:
The device wafer is pre-bonded to the carrier wafer before the final assembly process. This preliminary action ensures that the device wafer is already supported and flat when it undergoes subsequent processing steps, preventing warpage from developing during assembly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively addresses the instability and flatness issues of thin wafers, enhancing device quality and preventing package warpage by providing a robust and flat support structure during processing.
Implementation Method 1
coating an adhesive material onto a second side of the device wafer to form a first adhesive layer, coating the adhesive material onto the carrier to form a second adhesive layer, performing a partial curing process on the first adhesive layer and the second adhesive layer, bonding the device wafer to the carrier through bonding the first adhesive layer and the second adhesive layer together
Data Source
AI summary
An apparatus includes a backside supporting layer having a first thickness, an adhesive layer over the backside supporting layer, a metal layer over the adhesive layer, wherein the metal layer functions as a backside connector, a semiconductor substrate layer over the metal layer, wherein the semiconductor substrate active layer has a second thickness, and a plurality of front side connectors, wherein active circuits in the semiconductor substrate layer over are electrically coupled between the plurality of front side connectors and the metal layer.