Backside Wafer Photolithography Alignment Using Cut-Edge Marks

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Solution Overview

Problem

Existing alignment methods for backside photolithography, such as infrared double-side and bottom alignment technologies, are limited by wafer thickness and material, leading to high costs and low yield due to fragmentation and require expensive equipment.

Innovation Solution

An alignment method that involves cutting a wafer to form alignment marks, bonding it to a pad, and aligning these marks with corresponding marks on a photomask, eliminating the need for infrared penetration and camera-based pattern mapping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If infrared double-side alignment technology is used, then alignment precision is improved, but it is only suitable for thin wafers and cannot penetrate certain wafer materials

Engineering Contradiction:

Improvealignment precisionVSAvoidwafer thickness and material adaptability

Core Design Contradiction:

Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent introduces alignment marks as an intermediary element that bridges the front and back sides of the wafer. These marks are formed on the front side and serve as reference points for aligning the back side pattern, eliminating the need for infrared penetration through the wafer while maintaining high alignment precision

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the optical/infrared alignment system with a mechanical marking and alignment system. Instead of using infrared light to map patterns through the wafer, the system uses physical alignment marks created on the wafer surface, which are then used as mechanical references for positioning the back side photolithography

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If bottom alignment technology with cameras is used, then alignment is achieved for thick wafers, but device cost increases and fragmentation occurs reducing yield

Engineering Contradiction:

Improvewafer thickness adaptabilityVSAvoidproduct yield

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent performs preliminary action by forming alignment marks on the front side of the wafer before the back side photolithography process. These marks are created in advance and serve as fixed references throughout subsequent processing, preventing fragmentation and maintaining high yield while enabling thick wafer processing

Inventive Principle:

Principle #10Preliminary action

3Adaptability or versatility

If bottom alignment technology with cameras is used, then alignment is achieved for thick wafers, but device cost and secondary expense increase

Engineering Contradiction:

Improvewafer thickness adaptabilityVSAvoidequipment cost

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the alignment function from complex optical systems (infrared sources, cameras, computer systems) and implements it through simple physical alignment marks. This extraction eliminates the need for expensive equipment while maintaining alignment capability for thick wafers of various materials

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS12406937B2Alignment method for backside photolithography process

Publication Date: 2025.09.02 SHENZHEN RUBEUST TECHNOLOGY LTD

AI summary

The present application provides an alignment method for backside photolithography process of the wafer, the alignment method includes: cutting the wafer, and using at least two edges formed by cutting as the first alignment mark; bonding the front side of the wafer to the wafer pad to form a composite wafer; aligning the first alignment mark with the corresponding second alignment mark on the photomask for backside photolithography. This method is not limited by wafer thickness and material, and reduces the secondary input of the photolithography equipment; meanwhile, the probability of fragments of thin wafers in the photolithography process can be reduced, and the yield of the product is effectively improved.