Backside Wafer Passive Components for Cleaner Power Delivery
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional semiconductor processing faces challenges in producing defect-free wafers with high-density circuits, as the etch-based subtractive process for forming passive devices can introduce non-linearities in electrical properties and seams in passive devices, affecting the performance of IC devices.
Innovation Solution
The use of an additive process to form passive devices on the back side of a full wafer device, where a layer of insulator material is deposited and patterned, and a conductive material is deposited into etched areas, resulting in a seam that can be observed in cross-sections, allowing for improved power delivery and reduced electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an etch-based subtractive process is used to form passive devices, then the manufacturing process is well-established and compatible with traditional semiconductor processing, but the process introduces non-linearities in electrical properties and seams in passive devices
Solution Approach 1:
The patent inverts the traditional subtractive etching process by using an additive deposition process to form passive devices. Instead of removing material to create passive device structures, the invention deposits conductive and insulator materials in a controlled sequence to build up the passive device structures, thereby eliminating the seams and non-linearities introduced by etching while maintaining manufacturing compatibility
Solution Approach 2:
The patent changes the fundamental process parameter from subtractive (etching) to additive (deposition). This parameter change transforms the formation mechanism of passive devices, allowing for more precise control over electrical properties and eliminating the harmful effects of the traditional etch-based approach while maintaining ease of manufacture through standard deposition equipment
2Reliability
If passive devices are formed on the back side of the wafer, then power delivery is improved and electromagnetic interference is reduced, but the wafer structure becomes more complex with multiple layers and seams
Solution Approach 1:
The patent utilizes the back side of the wafer as an additional dimension for placing passive devices and power delivery networks. By moving these components to the back side, the invention separates power delivery functions from the front-side logic circuits, improving power delivery performance and reducing electromagnetic interference without significantly increasing overall device complexity
Solution Approach 2:
The patent segments the wafer into distinct functional regions: front side for logic circuits and back side for passive devices and power delivery. This segmentation allows each side to be optimized independently, improving overall reliability while managing complexity through functional separation rather than integrating all components on a single side
3Manufacturing precision
If the additive process is used to form passive devices, then seams and non-linearities are reduced, but the process requires additional deposition steps and material layers
Solution Approach 1:
The patent merges the formation of passive devices with the existing multi-layer interconnect structure. By integrating passive device formation into the sequence of depositing conductive and insulator layers, the invention achieves improved passive device uniformity without adding significant process complexity, as the deposition steps are combined with standard interconnect formation procedures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance of IC devices by reducing defects and non-linearities, improving power delivery, and minimizing electromagnetic interference, while maintaining the integrity of the wafer structure.
Implementation Method 1
a conductive material is deposited into etched areas
Data Source
AI summary
Described herein are full wafer devices that include passive devices formed in a power delivery structure. Power is delivered to the full wafer device on a backside of the full wafer device. A passive device in a backside layer is formed using an additive process that results in a seam running through the passive device. The seam may be, for example, an air gap, a change in material structure, or a region with a different chemical makeup from the surrounding passive device.