Backside-Wired Semiconductor Structure for Low-Capacitance Contacts
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Solution Overview
Problem
As semiconductor devices continue to shrink in size, there is a need for methods to reduce capacitance between contacts and ensure electrical stability, while maintaining device performance and integration density.
Innovation Solution
The semiconductor device incorporates a specific structure including a first lower pattern with sidewalls and surfaces, channel separation structures, field insulating films, channel patterns, source/drain patterns, contact blocking patterns, backside source/drain contacts, and backside wiring lines, optimized to reduce capacitance and enhance electrical stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the pitch size of semiconductor devices is decreased to increase integration density, then the integration density is improved, but the capacitance between contacts increases and electrical stability deteriorates
Solution Approach 1:
The device structure is segmented into multiple layers including lower patterns, channel separation structures, field insulating films, channel patterns, source/drain patterns, contact blocking patterns, and backside contacts. This segmentation allows each component to be optimized independently for its specific function while maintaining overall electrical stability despite reduced pitch sizes
Solution Approach 2:
The patent transitions from two-dimensional planar structures to three-dimensional vertically-stacked structures. Multiple channel patterns and source/drain patterns are arranged in the vertical dimension, allowing increased integration density without proportionally increasing lateral capacitance between contacts
2Quantity of substance
If the pitch size of semiconductor devices is decreased to improve integration density, then the integration density is improved, but the capacitance between contacts increases
Solution Approach 1:
Field insulating films and channel separation structures serve as intermediary elements between adjacent conductive components. These insulating layers act as mediators that electrically isolate neighboring contacts and conductive patterns, reducing parasitic capacitance while allowing the device structure to maintain high integration density
Solution Approach 2:
Different regions of the device are assigned different material properties and structural characteristics optimized for their specific functions. Contact blocking patterns use insulating materials in specific locations to prevent unwanted electrical coupling, while channel separation structures provide localized insulation between adjacent channels, reducing capacitance in critical areas without compromising overall integration
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes a first lower pattern extending in a first direction and including first and second sidewalls, which are opposite to each other in a second direction, and upper and lower surfaces, which are opposite to each other in a third direction, a channel separation structure extending in the first direction and contacting the first sidewall of the first lower pattern, a field insulating film contacting the second sidewall of the first lower pattern, first channel patterns disposed on an upper surface of the first lower pattern and including first sheet patterns, which are spaced apart from one another in the third direction, the first sheet patterns contacting the channel separation structure, first source/drain patterns contacting the first channel patterns and the channel separation structure, contact blocking patterns disposed on the first source/drain patterns and formed of an insulating material, the contact blocking patterns having upper surfaces on the same plane as an upper surface of the channel separation structure, first backside source/drain contacts disposed within the first lower pattern and connected to the first source/drain patterns and backside wiring lines disposed on the lower surface of the first lower pattern and connected to the first backside source/drain contacts.