Backside Wiring Structure With Etch-Stop Through Contacts
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Solution Overview
Problem
Semiconductor devices face challenges in achieving improved power, performance, area, and cost (PPAC) due to increasing complexity and integration, particularly in maintaining reliable backside power delivery networks with high aspect ratio through contacts that can cause leakage currents and variations in contact resistance.
Innovation Solution
The semiconductor device incorporates an etch stop layer that extends along the substrate's side but not the active pattern's side faces, allowing for precise through contact formation and reducing leakage currents, while a backside wiring structure on the opposite side provides a power delivery network, enhancing PPAC characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If through contacts with high aspect ratio are used to achieve compact device size, then area is reduced, but leakage currents increase and contact resistance varies
Solution Approach 1:
An etch stop layer is introduced as an intermediary structure between the substrate and the through contact. This layer has different etch selectivity than surrounding materials, enabling precise control of the through contact depth and position. The etch stop layer acts as a mediator that allows the through contact to reach the desired depth without excessive aspect ratio, thereby reducing leakage currents and contact resistance variation while maintaining compact device size.
2Power
If backside wiring structure is added to improve power delivery, then power distribution is enhanced, but device complexity increases
Solution Approach 1:
The wiring structure is extended to the backside of the substrate, utilizing the third dimension (vertical depth) for power distribution. By routing power and signal lines through the backside of the substrate and using through contacts to connect to front-side elements, the design achieves improved power delivery capability without increasing the planar footprint or significantly complicating the overall device architecture.
3Reliability
If etch stop layer is used to reduce leakage currents, then reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The etch stop layer is designed with specific material properties and thickness parameters that optimize its performance. By carefully selecting the etch selectivity ratio between the etch stop layer and surrounding materials, and by controlling the layer thickness within a specific range, the design achieves effective leakage current reduction while maintaining reasonable manufacturing precision requirements. The parameter optimization allows standard fabrication processes to achieve the desired positioning accuracy.
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes: a substrate including a first side and a second side opposite to the first side; an active pattern that is on the first side and extends in a first direction; an etch stop layer that extends along the first side of the substrate and does not extend along side faces of the active pattern; a field insulating film that is on the first side and covers at least a part of the side faces of the active pattern; a gate structure that extends in a second direction intersecting the first direction on the active pattern and the field insulating film; a through contact that extends in a third direction intersecting the first direction and the second direction and penetrates the field insulating film and the etch stop layer; a buried pattern connected to the through contact, inside the substrate; and a backside wiring structure that is on the second side and electrically connected to the buried pattern.