Hardware-Accelerated Backup Compression for CPU Bandwidth Bottlenecks

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Solution Overview

Problem

Current data compression methods in storage systems are bottlenecked by CPU bandwidth, limiting performance and preventing the use of high-compression algorithms like GZ due to high CPU utilization, and lack compatibility and performance optimizations for hardware accelerators, which can lead to latency and thread context switch overheads.

Innovation Solution

Implementing a data compression system that segments user data, deduplicates, and compresses using a hardware accelerator like QuickAssist Technology, which offloads compression tasks to reduce CPU load and increase logical storage space, utilizing GZ compression to achieve higher compression rates and support compatibility with existing systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If CPU-based compression is used, then system compatibility is maintained, but CPU bandwidth is consumed and performance is bottlenecked

Engineering Contradiction:

Improvesystem compatibilityVSAvoidcompression performance

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent extracts the compression function from the CPU by introducing a dedicated hardware compression accelerator. This allows the CPU to offload compression tasks, maintaining system compatibility while significantly improving compression performance and reducing CPU bandwidth consumption.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a hardware compression accelerator as an intermediary component between the CPU and storage system. This intermediary handles compression operations, resolving the conflict between maintaining CPU-based compatibility and achieving hardware-accelerated performance.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If hardware accelerator is used, then compression performance is improved, but latency and thread context switch overheads increase due to lack of compatibility optimizations

Engineering Contradiction:

Improvecompression performanceVSAvoidlatency

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by pre-configuring the hardware compression accelerator with optimized parameters and pre-establishing data transfer pathways. This reduces latency during actual compression operations by eliminating setup overhead and optimizing the compression pipeline in advance.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent optimizes hardware accelerator parameters such as compression algorithm selection, buffer sizes, and thread configurations to minimize latency and context switch overheads. By adjusting these parameters, the system achieves both high compression performance and low latency.

Inventive Principle:

Principle #35Parameter changes

3Loss of substance

If high-compression algorithms like GZ are used, then compression ratio is increased, but CPU utilization increases and performance is limited

Engineering Contradiction:

Improvedata sizeVSAvoidcompression speed

Core Design Contradiction:

Loss of substanceVSProductivity

Solution Approach 1:

The patent replaces the mechanical CPU-based compression system with a hardware compression accelerator that can execute high-compression algorithms like GZ at much higher speeds. This substitution enables both high compression ratios and high compression speeds by leveraging dedicated hardware resources.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11438010B2System and method for increasing logical space for native backup appliance

Publication Date: 2022.09.06 EMC IP HLDG CO LLC

AI summary

One embodiment provides a computer implemented method of data compression including segmenting user data into data segments; deduplicating the data segments to form deduped data segments; compressing the deduped data segments into compression units using a hardware accelerator; packing the compression units into compression regions; and packing the compression regions into one or more containers.