Bad Block Controller for Multi-Channel Memory Systems
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Solution Overview
Problem
Current memory systems face inefficiencies in managing bad memory blocks, particularly in portable electronic devices where stability and durability are crucial, and existing solutions do not effectively integrate and manage bad memory blocks across multiple channels or ways efficiently.
Innovation Solution
A memory system architecture that includes multiple memory devices coupled to different channels or ways, with a bad block controller that selects and transfers substitute physical addresses to replace bad physical addresses, using bad block tables and path control elements to manage access and distribute bad block information across channels or ways.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple memory devices are used to increase storage capacity, then the storage capacity is improved, but the complexity of managing bad memory blocks increases
Solution Approach 1:
The patent divides the bad block management system into separate channel-specific bad block tables (first bad block table for first channel, second bad block table for second channel) and dedicated path control elements for each channel. This segmentation allows each channel to independently manage its own bad blocks, reducing the overall management complexity while maintaining multi-channel operation.
Solution Approach 2:
The patent introduces path control elements as intermediary components that receive address requests, determine the appropriate channel and memory device, and route requests to the correct access controller. These intermediaries simplify the management architecture by centralizing the address routing logic and isolating the complexity of multi-channel coordination.
2Ease of operation
If bad blocks are managed separately in each channel, then the management simplicity is improved, but the utilization of substitute blocks across channels deteriorates
Solution Approach 1:
The patent enables substitute memory blocks to serve multiple functions across different channels. A substitute block in one channel can be allocated to replace bad blocks in another channel, allowing the same physical resource to be shared universally. This multi-functional approach improves overall block utilization while maintaining separate management structures.
Solution Approach 2:
The patent merges the substitute block pools from multiple channels into a unified allocation system. The path control elements coordinate to distribute substitute blocks across channels based on demand, combining resources that were previously siloed in channel-specific tables. This merging increases productivity by allowing more flexible and efficient use of available good blocks.
3Reliability
If substitute physical addresses are transferred through multiple controllers, then the reliability is improved, but the access time increases
Solution Approach 1:
The patent performs preliminary actions by pre-establishing the multi-channel architecture with dedicated path control elements and channel-specific bad block tables during system initialization. The path control elements are pre-configured to recognize address patterns and route requests appropriately, so that during actual operation, address transfers follow predetermined efficient paths without requiring complex real-time decisions.
Solution Approach 2:
The patent introduces dynamic routing capabilities where the path control elements can adaptively select the most efficient path for address transfers based on current system state. The system dynamically determines whether to use direct access or routed access through multiple controllers, optimizing the balance between reliability and access time based on real-time conditions.
Data Source
AI summary
A memory system include: a plurality of first memory devices each coupled to a first channel and including a plurality of first memory blocks; a plurality of second memory devices each coupled to a second channel and including a plurality of second memory blocks; a first access controller suitable for controlling an access to the first memory blocks; a second access controller suitable for controlling an access to the second memory blocks; and a bad block controller suitable for: selecting one between the first and second access controllers by comparing bad physical addresses corresponding to bad blocks included in each of the first and second memory devices with first and second physical addresses respectively corresponding to the first and second memory blocks, and transferring one of the first and second physical addresses and substitute physical address that replace the bad physical addresses.