Remapping Bad Blocks in Memory Sub-Systems for Performance Consistency
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Solution Overview
Problem
Memory sub-systems face performance inconsistencies due to uneven distribution of bad blocks across block stripes, leading to reduced memory capacity and inefficient data storage, as bad blocks tend to cluster together, affecting sequential write operations and overall system reliability.
Innovation Solution
The solution involves remapping bad blocks from block stripes with excessive bad blocks to those with fewer bad blocks, using a skew offset to distribute them evenly across multiple planes, thereby maintaining performance consistency and increasing memory sub-system efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bad blocks are allowed to cluster in certain block stripes, then manufacturing yield is improved, but performance consistency deteriorates
Solution Approach 1:
The patent segments block stripes into different groups (first group and second group) based on their bad block density. By dividing the block stripe space and applying different treatments to different segments, the system can tolerate clusters of bad blocks in one segment while maintaining performance consistency in other segments, thus resolving the contradiction between manufacturing yield and performance consistency.
Solution Approach 2:
The patent applies different quality standards and remapping strategies to different local regions (block stripes) based on their bad block characteristics. Block stripes with excessive bad blocks are identified and handled differently from those with acceptable bad block counts, allowing local optimization that maintains overall system performance consistency while accommodating manufacturing variations.
2Reliability
If bad blocks are remapped from block stripes with excessive bad blocks, then performance consistency is improved, but device complexity increases
Solution Approach 1:
The patent performs preliminary identification and classification of block stripes with excessive bad blocks during the formatting or initialization phase. By pre-marking problematic block stripes and pre-establishing remapping relationships, the system avoids complex real-time decision-making during normal operations, thus improving performance consistency while keeping the remapping mechanism relatively simple.
Solution Approach 2:
The patent introduces an intermediary mapping layer between the physical block stripes and the logical address space. This intermediary remapping table acts as a mediator that translates logical addresses to physical locations, absorbing the complexity of bad block management in the mapping layer rather than requiring complex handling in the memory controller or during data operations.
3Quantity of substance
If block stripes with excessive bad blocks are identified and remapped, then memory capacity utilization is improved, but processing time increases
Solution Approach 1:
The patent performs the identification and remapping of block stripes with excessive bad blocks in advance, during low-level formatting or initialization operations. By completing this time-consuming process beforehand, the system maximizes usable memory capacity while ensuring that normal read/write operations do not suffer from increased processing time, as the remapping relationships are already established.
Data Source
AI summary
A system includes a memory device having a plurality of memory planes and a processing device operatively coupled with the memory device. The processing device to is perform operations including identifying a first block stripe of the memory device. The first block stripe includes a first plurality of blocks arranged across the plurality of memory planes. The operations further include determining that the first plurality of blocks of the first block stripe has greater than a threshold number of blocks associated with an error condition. Responsive to determining that the first plurality of blocks has greater than the threshold number of blocks associated with the error condition, the operations further include mapping a block of the first plurality of blocks associated with the error condition to a second block stripe including a second plurality of blocks having fewer than the threshold number of blocks associated with the error condition.