Bad Page Management in Memory Device Using Bad Page Map
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Solution Overview
Problem
The challenge lies in achieving high-density memory devices while maintaining semiconductor yield, as increased memory density often leads to a decrease in reliability due to bad cells, which existing techniques struggle to manage effectively.
Innovation Solution
A memory device and system that incorporate a memory cell array divided into first and second memory blocks, along with a bad page map to store bad page location information, allowing fail page addresses to be replaced by pass page addresses from the second memory block, thereby improving semiconductor yield without requiring full density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory density is increased to meet high-density requirements, then memory capacity is improved, but reliability deteriorates due to increased bad cells
Solution Approach 1:
The memory device is divided into multiple memory blocks (first memory block, second memory block), each with its own bad page map. This segmentation allows independent management of bad cells in different blocks, enabling targeted replacement strategies that preserve overall reliability while maintaining high density.
Solution Approach 2:
A bad page map is introduced as an intermediary data structure that stores bad page location information. This map acts as a mediator between the physical memory cells and the logical address space, enabling the system to detect, track, and replace bad pages without affecting the overall memory density or requiring extensive redundant cells.
2Reliability
If redundant memory cells are added to replace bad cells, then reliability is improved, but device complexity increases
Solution Approach 1:
The bad page map is populated with bad page location information during manufacturing or initialization, before the memory device enters normal operation. This preliminary action allows the system to proactively identify and mark bad pages, enabling seamless replacement during operation without requiring complex real-time detection mechanisms.
Solution Approach 2:
When a bad page is detected in the first memory block, its functionality is copied to a corresponding pass page in the second memory block. The bad page map stores the mapping relationship between fail page addresses and pass page addresses, allowing the system to transparently redirect access from bad pages to their good counterparts without requiring physical redundant cells.
3Productivity
If bad page replacement is implemented, then semiconductor yield is improved, but manufacturing precision requirements increase
Solution Approach 1:
The memory device performs self-diagnosis and self-repair through the bad page map mechanism. During manufacturing or initialization, the system automatically detects bad pages and records their locations in the bad page map. During normal operation, the system automatically redirects access from bad pages to pass pages without external intervention, enabling yield improvement without requiring highly precise manufacturing processes.
Data Source
AI summary
A memory device comprises a memory cell array and a bad page map. The memory cell array comprises a plurality of memory cells arranged in pages and columns, wherein the memory cell array is divided into a first memory block and a second memory block each corresponding to an array of the memory cells. The bad page map stores bad page location information indicating whether each of the pages of the first memory block is good or bad. A fail page address of the first memory block is replaced by a pass page address of the second memory block according to the bad page location information.