Balanced C-Element Circuit for Symmetrical Delay Paths
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Solution Overview
Problem
Muller C-elements in adaptive oscillator circuits lack symmetrical signal paths, leading to timing and performance issues due to unbalanced delays, which can cause frequency overshoot and timing violations under power supply voltage fluctuations.
Innovation Solution
Incorporating a balancing circuit and bypass control capability into the C-element circuit to equalize delays and provide a symmetrical signal path, using a stack of input transistors and an output latch, and employing regulated and droopy supply voltages to adjust clock frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a traditional Muller C-element is used in an adaptive oscillator circuit, then the circuit structure is simple, but the signal path is asymmetrical causing timing skew and frequency overshoot
Solution Approach 1:
The patent applies asymmetry principle by introducing a balancing circuit with opposite polarity transistors to counterbalance the inherent asymmetry in the Muller C-element. The balancing circuit creates symmetrical signal paths by adding compensating elements that mirror the asymmetrical delays, thereby achieving timing symmetry while maintaining the simplicity of the original C-element structure.
2Manufacturing precision
If the C-element circuit is modified to provide symmetrical signal paths, then timing performance is improved, but the circuit complexity increases
Solution Approach 1:
The patent merges the balancing circuit functionality directly into the C-element structure by integrating opposite polarity transistors alongside the original transistors. This combination allows the balancing function to be achieved without adding separate independent circuits, thereby improving timing symmetry while minimizing the increase in overall circuit complexity.
3Adaptability or versatility
If regulated supply voltage is used for one delay line and droopy supply voltage for another, then frequency adjustment capability is provided, but voltage fluctuations cause timing instability
Solution Approach 1:
The patent applies the anti-weight principle by using opposite polarity transistors in the balancing circuit that counteract the effects of voltage fluctuations. When voltage droops affect one signal path, the opposite polarity transistors in the balancing circuit provide compensating effects that counterbalance the timing skew, thereby maintaining timing stability despite frequency adjustment capabilities.
Data Source
AI summary
A C-element circuit for use in an oscillator or the like includes a first input terminal for receiving a first input signal, a second input terminal for receiving a second input signal, and an output latch for providing an output signal based on a relationship between the two input signals. A stack of input transistors is included with an outer pair of input transistors with gates connected to the first input terminal and an inner pair of input transistors with gates connected to a second input terminal. A balancing circuit operates to equalize a first delay of a change in the first input signal affecting the output signal with a second delay of a change in the second input signal affecting the output signal. Bypass control techniques are provided for using the C-element circuit with a single input.