Balanced Signal Processing Circuit With Comparator Offset Correction
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Solution Overview
Problem
Existing balanced signal processing circuits in analog-digital conversion systems face challenges in reducing power consumption due to steady current issues, which hinder the development of lightweight and portable electronic devices.
Innovation Solution
Incorporating a dynamic latch comparator with an offset voltage correction mechanism that detects abnormal operation states and applies a predetermined offset voltage to capacitors to ensure the comparator operates within its voltage range, eliminating steady current and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an amplifier is inserted in the preceding stage of the comparator to adjust the bias voltage of the input signal, then the voltage of the input signal is within the operation voltage range of the comparator, but a steady current occurs in the amplifier and power consumption increases
Solution Approach 1:
The invention extracts and removes the amplifier component from the signal processing chain by directly connecting the output of the sampling switch to the input of the comparator. This eliminates the steady current consumption of the amplifier while ensuring the comparator receives signals within its operating voltage range through proper circuit design.
Solution Approach 2:
The sampling switch performs preliminary signal selection and conditioning before the signal reaches the comparator. By controlling the sampling switch to connect the signal source to the comparator input only when needed, the circuit prepares the signal at the appropriate voltage level without requiring a continuously powered amplifier.
2Reliability
If an amplifier is used to adjust the bias voltage of the input signal, then the comparator can operate normally, but the steady current inhibits decrease in power consumption and increases device weight
Solution Approach 1:
The amplifier is completely removed from the circuit configuration. The sampling switch directly couples the signal source to the comparator, eliminating the need for weighty amplifier components while maintaining signal integrity through controlled sampling operation.
Solution Approach 2:
The sampling switch operates periodically to transfer signals to the comparator only when required for conversion. This periodic action eliminates the need for continuous power consumption and reduces the weight of components by removing the amplifier that would otherwise be required to maintain continuous signal levels.
3Use of energy by moving object
If a dynamic latch comparator is employed to reduce consumed power, then power consumption decreases, but the comparator requires clock input and has a limited operation voltage range
Solution Approach 1:
The circuit changes the voltage parameters of the input signal through the sampling switch operation. By controlling when the sampling switch connects the signal source to the comparator, the circuit ensures the comparator receives signals within its narrow operating voltage range while maintaining the low power consumption characteristics of the dynamic latch comparator.
Solution Approach 2:
The sampling switch performs preliminary signal conditioning by connecting the signal source to the comparator input at the appropriate moment in the clock cycle. This preliminary action ensures the comparator receives properly timed and voltage-level-appropriate signals, enabling the dynamic latch comparator to operate within its limited voltage range without requiring an amplifier.
Data Source
AI summary
A balanced signal processing circuit includes: a comparator; a first capacitor having a first end connected to a non-inverting input terminal of the comparator; a second capacitor having a first end connected to an inverting input terminal of the comparator; a first switch configured to apply a voltage signal to the first end of the first capacitor; a second switch configured to apply a voltage signal to the first end of the second capacitor; an operation state detection section configured to detect an operation state of the comparator; and an offset voltage correction section configured to apply a predetermined offset voltage to a second end of the first capacitor and a second end of the second capacitor when the operation state detection section detects an abnormal operation state of the comparator.