Balanced Transformer Windings for Lower Interwinding EMI
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Solution Overview
Problem
Electronic devices often suffer from electromagnetic interference (EMI) due to parasitic interwinding capacitance in transformers, which causes secondary ground bounce and radiation, especially at high input voltages, and existing solutions fail to effectively mitigate these issues.
Innovation Solution
A multilevel lamination structure with balanced primary and secondary transformer windings and a shield winding is used, where the windings are designed with coplanar and adjacent turns to balance interwinding capacitance, reducing EMI through the integration of a core layer and dielectric layers with conductive features in metal layers, and a package structure encloses the magnetic assembly to enhance electrical isolation and reduce radiation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If traditional transformer windings are used, then the transformer can operate at high input voltages, but parasitic interwinding capacitance causes EMI radiation and secondary ground bounce
Solution Approach 1:
The patent applies asymmetry by positioning the first and final turns of the primary winding adjacent to each other in the same metal layer, while the secondary winding is positioned on the opposite side of the core layer. This asymmetric configuration creates balanced interwinding capacitance that cancels out EMI radiation, resolving the contradiction between high voltage operation and EMI reduction.
Solution Approach 2:
The patent transitions from conventional planar winding arrangements to a three-dimensional multilevel lamination structure with windings distributed across multiple metal layers separated by dielectric layers. This dimensional change enables the primary and secondary windings to be positioned in adjacent metal layers with the core layer between them, achieving balanced interwinding capacitance and reduced EMI while maintaining high voltage operation.
2Ease of manufacture
If non-symmetrical distributed interwinding capacitance is present, then the transformer can be manufactured with conventional methods, but differential mode voltage contributes to EMI radiation
Solution Approach 1:
The patent changes the physical parameters of the winding structure by positioning turns in adjacent metal layers with controlled spacing and introducing a core layer between primary and secondary windings. This parameter change transforms the interwinding capacitance distribution from non-symmetrical to balanced, eliminating differential mode voltage and EMI radiation while remaining compatible with conventional PCB manufacturing processes.
3Object-generated harmful factors
If EMI reduction measures are added to the transformer design, then EMI performance improves, but device size increases
Solution Approach 1:
The patent merges the EMI reduction function with the transformer's structural components by integrating the balanced interwinding capacitance design into the multilevel lamination structure itself. The core layer and dielectric layers serve dual purposes: providing mechanical support and electrical isolation while simultaneously achieving EMI reduction through their positioning between primary and secondary windings. This eliminates the need for separate EMI filtering components, maintaining compact device size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively mitigates EMI by balancing interwinding capacitance and reducing secondary ground bounce, providing a reliable and repeatable EMI reduction method that can be easily integrated into transformer designs without increasing device size, and can be used alone or in combination with external filters.
Implementation Method 1
One source of EMI is the current injection through the parasitic interwinding capacitance of a transformer. The injected current creates a secondary ground bounce which generates a line disturbance
Implementation Method 2
The core layer and the dielectric layers extend in respective planes of orthogonal first and second directions and are stacked along an orthogonal third direction
Data Source
AI summary
An electronic device includes a multilevel lamination structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers. The core layer and the dielectric layers extend in respective planes of orthogonal first and second directions and are stacked along an orthogonal third direction. The conductive features include a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn adjacent to one another in the same metal layer of the first pair, and a second patterned conductive feature having multiple conductive turns in a second pair of the metal layers to form a second winding having a first turn and a final turn.