Integrated Balun-Inductor Coil Layout for Low-Interference Chips
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Solution Overview
Problem
The integration of a balun transformer and an inductor into a single chip in existing composite electronic components leads to increased conductor layers and mutual interference between these elements, as described in JP 2004-304615A.
Innovation Solution
The integration of balun transformer and inductor coil patterns in the same conductor layers, with opposing winding directions and magnetic flux cancellation, along with magnetic and nonmagnetic material filling and shielding, reduces conductor layers and interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If balun transformer and inductor elements are stacked in separate conductor layers, then integration into one chip is achieved, but the number of conductor layers increases and mutual interference occurs
Solution Approach 1:
The patent merges the balun transformer and inductor elements into the same conductor layer, forming a planar integrated structure where both components coexist in the first and second conductor layers without requiring additional stacked layers, thus reducing overall device complexity while maintaining integration
Solution Approach 2:
The patent transitions from vertical stacking (z-dimension) to planar arrangement (x-y dimension) by forming coil patterns that overlap in the plane rather than stacking conductor layers vertically, effectively using dimensional reconfiguration to reduce layer count
2Adaptability or versatility
If balun transformer and inductor elements are stacked in separate conductor layers, then integration into one chip is achieved, but mutual interference between components increases
Solution Approach 1:
The patent extracts the harmful magnetic flux from the inductor elements by introducing grounding patterns that provide alternative current paths, effectively removing the interference component while preserving the inductive function
Solution Approach 2:
The patent introduces grounding patterns as intermediary elements between the balun transformer and inductor elements, which act as magnetic shields to block and dissipate interfering magnetic flux through the ground reference plane
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes conductor layers and interference, enhances inductance, and simplifies layout while maintaining balanced signal conversion and noise reduction.
Implementation Method 1
the winding direction of the third coil pattern starting from the third terminal electrode and the winding direction of the fourth coil pattern starting from the fourth terminal electrode may be opposite to each other. Thus, magnetic fluxes generated by current flowing in the third and fourth coil patterns cancel each other
Implementation Method 2
the inner diameter areas of the first and second coil patterns may each be filled with a magnetic material. This can increase inductances of the first and second coil patterns
Implementation Method 3
the inner diameter areas of the third and fourth coil patterns may each be filled with a nonmagnetic material. This can prevent magnetic saturation of the third and fourth coil patterns
Implementation Method 4
a magnetic shield made of a magnetic material may be provided between a group of the first and second coil patterns and a group of the third and fourth coil patterns. This can further reduce mutual interference between the group of the first and second coil patterns and the group of the third and fourth coil patterns
Data Source
AI summary
Disclosed herein is a composite electronic component that includes: a first coil pattern formed on at least a first conductor layer, the first coil pattern having one end coupled to the first terminal electrode and other end coupled to the second terminal electrode; a second coil pattern formed on at least a second conductor layer; a third coil pattern formed on at least the first and second conductor layers, the third coil pattern having one end coupled to the one end of the second coil pattern and other end coupled to the third terminal electrode; and a fourth coil pattern formed on at least the first and second conductor layers, the fourth coil pattern having one end coupled to the other end of the second coil pattern and other end coupled to the fourth terminal electrode.


