Band Engineered Semiconductor Device With Inverted V Profile
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Solution Overview
Problem
Existing FinFET devices face challenges in controlling short channel effects and reducing OFF-state leakage current due to inadequate control over the center of the fin, where the gate control is worse, leading to higher current leakage.
Innovation Solution
A semiconductor device with a protruding structure featuring an inverted 'V' band gap profile, where the band gap increases from the lateral edges to the center, achieved through epitaxial growth of SiGe with a Ge concentration gradient, forming a fin with a buried and extended portion, and a method for manufacturing this device involving chemical mechanical polishing and epitaxial growth to create a horizontal gradient in Ge concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If planar MOSFET transistors are scaled down, then device size is reduced, but short channel effects increase and OFF-state leakage current increases
Solution Approach 1:
The patent transitions from planar 2D channel structure to a 3D FinFET structure with vertical fins extending from the substrate. This dimensional change provides additional gate control surfaces and improves electrostatic control over the channel, effectively suppressing short channel effects while maintaining scaled device dimensions.
Solution Approach 2:
The patent employs composite material structure with silicon germanium (SiGe) forming the fin structure and silicon oxide as the gate dielectric. The SiGe material provides beneficial strain effects and band gap engineering properties that enhance carrier mobility and improve gate control, thereby reducing OFF-state leakage current in scaled devices.
2Volume of moving object
If planar MOSFET transistors are scaled down, then device size is reduced, but OFF-state leakage current increases
Solution Approach 1:
The vertical fin structure creates additional gate control surfaces that wrap around the channel, providing superior electrostatic control compared to planar structures. This enhanced control prevents carrier leakage in the OFF state while maintaining compact device footprint.
Solution Approach 2:
The patent utilizes band gap engineering by varying Ge concentration in the SiGe fin structure. By adjusting the composition parameter, the band gap is optimized to reduce thermally generated carriers and minimize OFF-state leakage current in scaled devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces OFF-state leakage current by preferentially locating holes at the Ge-rich edges and reducing carrier concentration in the center, enhancing gate control and enabling the formation of dual- or tri-gate transistors with improved performance.
Implementation Method 1
forming protruding structures in the recess by growing epitaxial a semiconductor material in the recess filling and overgrowing the recess
Implementation Method 2
performing chemical mechanical polishing to remove any overgrown semiconductor material before recessing back the dielectric material
Data Source
AI summary
The disclosure is related to a band engineered semiconductor device comprising a substrate and a protruding structure that is formed in a recess in the substrate. The protruding structure extends above the recess and has a buried portion and an extended portion. At least the extended portion comprises a semiconductor material having an inverted ‘V’ band gap profile with a band gap value increasing gradually from a first value at lateral edges of the structure to a second value, higher than the first value, in a center of the structure. The disclosure is also related to the method of manufacturing of such a band engineered semiconductor device.