Band Pass Filter Memory Package Signal Integrity Power
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Solution Overview
Problem
As semiconductor memory devices operate at higher speeds, signal swing widths decrease, leading to signal distortion and reflection, which existing on-die termination (ODT) circuits attempt to mitigate but at the cost of increased power consumption.
Innovation Solution
The implementation of band pass filters within the multi-level package substrate, replacing ODT circuits, which include capacitors and inductors to manage signal frequencies without forming a DC path, thereby reducing power consumption and enhancing signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an on-die termination (ODT) circuit is used to improve signal integrity, then signal reflection is reduced, but power consumption increases
Solution Approach 1:
The ODT function is extracted from the memory chip and relocated to the package substrate. The substrate now contains termination circuits that provide impedance matching and signal reflection reduction, while the memory chip operates without the power-consuming ODT circuitry, thereby resolving the contradiction between signal integrity and power consumption.
Solution Approach 2:
The package substrate acts as an intermediary between the memory chip and the external world. It provides the termination function that was previously required on the chip itself, allowing the chip to operate in a low-power mode while still maintaining signal integrity through the substrate's termination circuits.
2Speed
If signal swing width is decreased to reduce transmission time, then signal transmission speed improves, but signal distortion and reflection increase
Solution Approach 1:
The patent employs multiple reception stages with amplification at each stage. The first receiver amplifies weak signals from the package substrate, and the second receiver on the memory chip further amplifies the signal. This multi-stage amplification approach allows small swing widths (enabling high speed) to be effectively boosted back to usable levels, resolving the contradiction between speed and signal integrity.
3Reliability
If multiple receivers are implemented to improve signal reception, then signal integrity improves, but device complexity increases
Solution Approach 1:
The patent distributes reception functionality across different spatial dimensions and layers. The first receiver is implemented in the package substrate (lower layer), while the second receiver is integrated on the memory chip itself (upper layer). This vertical distribution of reception stages achieves enhanced signal reception capability while organizing the complexity across different physical dimensions rather than concentrating it in a single location.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption by approximately 62.5% and improves signal integrity through increased eye opening ratio, effective noise blocking, and reduced total capacitance, while eliminating signal reflection.
Implementation Method 1
The first band pass filter is formed in the multi-level package substrate, is connected to the first receiver, and passes a first data signal within a first frequency band
Implementation Method 2
the band pass filter does not include a resistor and includes only the capacitor and the inductor, a DC path between the power supply voltage and the ground voltage may not be formed, and thus the power consumption of the memory chip may be reduced
Implementation Method 3
the band pass filter does not include a resistor and includes only the capacitor and the inductor
Implementation Method 4
the signal integrity may be improved based on increasing of eye opening ratio, inductor behavior, blocking of high frequency noise
Data Source
AI summary
A memory package includes a multi-level package substrate, a first memory chip, a second memory chip, a first band pass filter and a second band pass filter. The multi-level package substrate includes a plurality of wiring layers and a plurality of insulating layers alternately stacked on one another. The first memory chip is on the multi-level package substrate, and includes a plurality of first memory cells and a first receiver. The second memory chip is on the first memory chip, and includes a plurality of second memory cells and a second receiver. The first band pass filter is in the multi-level package substrate, is connected to the first receiver, and passes a first data signal within a first frequency band. The second band pass filter is in the multi-level package substrate, is connected to the second receiver, and passes a second data signal within the first frequency band.


