Cascoded Bandgap Reference With Flipped Voltage Follower for Low-Voltage PSRR
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Solution Overview
Problem
Existing bandgap reference circuits in DDR/GDDR memory architectures face challenges in achieving a low supply voltage with a good power supply rejection ratio (PSRR) due to a strong trade-off between mismatch and DC PSRR, particularly in low supply voltage operations, and the sensitivity of bipolar junction transistor diodes to process variations.
Innovation Solution
A flipped voltage follower cascoded bandgap reference architecture is introduced, which includes a cascoded transistor configuration with a flipped voltage follower structure to reduce impedance and suppress supply noise currents, improving PSRR without increasing power consumption or area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a conventional bandgap reference circuit is used in low supply voltage operation, then the supply voltage is reduced, but the power supply rejection ratio (PSRR) deteriorates
Solution Approach 1:
The bandgap reference circuit is divided into two independent noise paths: a first supply noise path including multiple transistors and a second supply noise path including a flipped voltage follower configuration. This segmentation allows each path to independently suppress noise from different sources, achieving high PSRR even at low supply voltages without requiring a single complex noise suppression mechanism.
Solution Approach 2:
The flipped voltage follower configuration acts as an intermediary element in the second supply noise path, reducing the impedance at the transistor and thereby suppressing supply noise currents. This intermediary structure enables effective noise rejection without directly increasing the supply voltage or power consumption.
2Device complexity
If the impedance at the transistor is not reduced, then the circuit structure remains simple, but supply noise currents increase and PSRR deteriorates
Solution Approach 1:
The flipped voltage follower configuration serves as an intermediary that reduces the impedance at the transistor node. This intermediary structure effectively suppresses supply noise currents by providing a low-impedance path for noise cancellation, achieving high PSRR without significantly complicating the overall circuit architecture.
Solution Approach 2:
The impedance parameter at the transistor node is actively changed through the flipped voltage follower configuration. By dynamically adjusting the impedance to a lower value, the circuit suppresses supply noise currents effectively while maintaining a relatively simple structure through parameter optimization rather than structural complexity.
3Object-affected harmful factors
If power consumption is increased to improve PSRR, then the power supply rejection ratio improves, but power consumption increases
Solution Approach 1:
The noise suppression function is segmented into two independent paths, each handling different noise sources efficiently. This segmentation allows the circuit to achieve high PSRR through architectural design rather than brute-force power consumption, as each path can be optimized for minimal power usage while collectively providing superior noise rejection.
Solution Approach 2:
The flipped voltage follower acts as a power-efficient intermediary that achieves noise suppression through impedance transformation rather than high power consumption. This intermediary mechanism provides effective PSRR improvement without requiring excessive power, unlike conventional approaches that rely on increasing bias currents.
Data Source
AI summary
Embodiments include herein are directed towards a circuit having a core bandgap reference circuit including a first transistor, a second transistor, and a differential amplifier. The circuit may further include a cascoded bandgap reference circuit in electrical communication with the core bandgap reference circuit, wherein the cascoded bandgap reference circuit includes a first supply noise path that includes a plurality of transistors that are electrically connected and a flipped voltage follower configuration that reduces an impedance at a transistor associated with a second supply noise path.


