Bandwidth-Aware Multi-Frequency Performance Estimation

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Solution Overview

Problem

Dynamic voltage and frequency scaling (DVFS) in processors faces challenges in predicting the performance impact of frequency changes due to the complex interplay between core frequency and non-core components like DRAM latency, leading to inadequate results from simple linear scaling models.

Innovation Solution

A bandwidth-aware multi-frequency performance estimation mechanism is implemented, which determines a saturation point for the memory subsystem by monitoring performance counters and adjusts voltage and frequency to meet specified performance targets, estimating core and memory times based on memory bandwidth relative to the saturation point.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If simple linear scaling models are used to predict performance impact of frequency changes, then the prediction process is simple, but the prediction accuracy is inadequate

Engineering Contradiction:
Improveprediction process simplicityVSAvoidperformance prediction accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent changes the parameters used in performance prediction from simple linear frequency scaling to a multi-parameter model that includes memory bandwidth saturation points, core frequency, and application-specific characteristics. This allows accurate prediction across different frequency points by accounting for non-linear relationships between frequency and performance, particularly how memory subsystem saturation affects overall system performance.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces a dynamic performance prediction mechanism that adapts to different operating conditions. Instead of using a static linear model, the system dynamically determines saturation points for memory subsystems and adjusts predictions based on current frequency, memory bandwidth utilization, and application behavior patterns, making the prediction accurate across varying operational states.

Inventive Principle:
Principle #15Dynamics

2Productivity

If processor frequency is increased to maximize system performance, then performance is improved, but energy consumption increases

Engineering Contradiction:
Improvesystem performanceVSAvoidenergy consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent performs preliminary characterization of the system to determine memory bandwidth saturation points before actual operation. By pre-determining these critical thresholds through offline analysis, the system can make informed frequency selection decisions during runtime, choosing the lowest frequency that still meets performance requirements and thus minimizing energy consumption while maintaining productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where performance predictions at different frequency points are used to guide frequency selection. The system continuously monitors actual performance and energy consumption, comparing predicted versus actual outcomes, and adjusts frequency decisions accordingly to optimize the performance-energy tradeoff based on real-time system state and application behavior.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10048741B1Bandwidth-aware multi-frequency performance estimation mechanism
Publication Date: 2018.08.14 ADVANCED MICRO DEVICES INC
  • US10048741B1 patent drawing
  • US10048741B1 patent drawing
  • US10048741B1 patent drawing

AI summary

Systems, apparatuses, and methods for implementing performance estimation mechanisms are disclosed. In one embodiment, a computing system includes at least one processor and a memory subsystem. During a characterization phase, the system utilizes a memory intensive workload to detect when the memory subsystem reaches its saturation point. Then, the system collects performance counter values during a sampling phase of a target application to determine the memory bandwidth. If the memory bandwidth is greater than the saturation point, then the system generates a prediction of the memory time which is based on a ratio of the memory bandwidth over the saturation point. Otherwise, if the memory bandwidth is less than the saturation point, the system assumes memory time is constant versus processor frequency. Then, the system uses the memory time and an estimate of the compute time to estimate a phase time for the target application at different processor frequencies.