Memory Device With Bank-Independent PIM Processing

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Solution Overview

Problem

Computational processing in memory devices is hindered by the limitation of Processing In Memory (PIM) blocks during bank inactivity, leading to reduced efficiency and utilization of memory device bandwidth.

Innovation Solution

In-memory processing memory devices with a PIM block that performs computational processing independently of inactive banks by utilizing a register to store instructions and executing them during bank inactive states, enhancing computational efficiency and bandwidth utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the PIM block stops operation while the bank access is limited, then the reliability of the bank operation is maintained, but the computational efficiency of the PIM block is lowered

Engineering Contradiction:
Improvebank operation reliabilityVSAvoidcomputational efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments computational instructions into two categories: those that require bank access and those that can execute independently. By segmenting the instruction set this way, the PIM block can continue executing independent instructions during bank inactive periods, resolving the contradiction between maintaining bank reliability and preserving computational efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic operation mode switching for the PIM block based on bank state. When the bank is inactive, the PIM block transitions to a different operational mode that allows independent instruction execution. This dynamic adaptation enables the system to maintain both bank reliability and computational efficiency by adjusting PIM block behavior according to real-time bank status.

Inventive Principle:
Principle #15Dynamics

2Productivity

If the PIM block operates independently during bank inactive state, then the computational efficiency is improved, but the device complexity increases

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidPIM block control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The PIM block incorporates self-service mechanisms to determine instruction independence and autonomously decide whether to execute instructions during bank inactive periods. The block monitors its own operational requirements and bank state, eliminating the need for complex external control signals and reducing overall system complexity while maintaining high computational efficiency.

Inventive Principle:
Principle #25Self-service

3Device complexity

If the computational processing device performs computations after acquiring data from memory device, then the memory device structure remains simple, but the computational processing speed is lowered

Engineering Contradiction:
Improvememory device structureVSAvoidcomputational processing speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent merges computational processing functionality directly into the memory device by integrating a PIM block with the bank structure. This combination allows computational operations to be performed within the memory device itself rather than requiring separate processing units, thereby increasing computational processing speed while maintaining relatively simple overall device structure.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250321877A1Memory device for performing in-memory processing and operating method thereof
Publication Date: 2025.10.16 SAMSUNG ELECTRONICS CO LTD
  • US20250321877A1 patent drawing
  • US20250321877A1 patent drawing
  • US20250321877A1 patent drawing

AI summary

An in-memory processing memory device may include: a bank including a cell array; and a processing in memory (PIM) block, associated with the bank, including a register that stores a plurality of instructions. The PIM block is configured to: acquire one or more instructions of the plurality of instructions stored in the register; determine whether the one or more instructions operate independently of the bank; and based on the one or more instructions operating independently of the bank, perform computational processing corresponding to the one or more instructions during a first time interval in which the bank is in an inactive state.