Bank-Specific Offset Address Decoding for Lower Standby Power

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Solution Overview

Problem

The increasing operating frequency of semiconductor memory devices leads to a proportional increase in standby power consumption, necessitating a technology to reduce standby power.

Innovation Solution

A semiconductor memory system with a memory controller that generates offset addresses based on a base address for a bank, using bank queues and schedulers to manage request processing, and an address decoder that adds offset addresses to base addresses for row and column operations, reducing the need for full addressing and thereby lowering power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If offset addressing is used to reduce standby power, then power consumption is reduced, but address decoding complexity increases

Engineering Contradiction:
Improvestandby power consumptionVSAvoidaddress decoding complexity
Core Design Contradiction:
Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The memory device stores the last accessed address in a register before the address decoding operation. This preliminary action allows the current address to be decoded by adding the offset to the stored last address, eliminating the need for full address decoding and reducing standby power consumption while maintaining manageable decoding complexity through the use of a simple addition operation.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If full addressing is used for all memory operations, then address accuracy is maintained, but power consumption increases

Engineering Contradiction:
Improveaddress accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The system applies different addressing methods to different memory access scenarios. For sequential or nearby memory accesses, offset addressing is used to reduce power consumption. For random or far-away accesses, full addressing is used to ensure accuracy. This local differentiation allows the system to optimize both power consumption and address accuracy based on the specific access pattern.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12456501B2Address decoding method, and memory controller and semiconductor memory system using the same
Publication Date: 2025.10.28 SAMSUNG ELECTRONICS CO LTD
  • US12456501B2 patent drawing
  • US12456501B2 patent drawing
  • US12456501B2 patent drawing

AI summary

A semiconductor memory system includes a memory device including plural banks, and a memory controller that generates an offset address for a first bank among the plural banks and a command indicating the offset address, based on a first request. The memory device generates a first address by adding the offset address to a base address for the first bank, according to the command, and performs a memory operation on the first address of the first bank according to the command.