Bank Sparing for Adaptive Double Device Data Correction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory error management techniques, such as Adaptive Double Device Data Correction (ADDDC), face challenges in accurately determining which bank or rank to map out when error thresholds are exceeded, leading to difficulties in identifying and correcting hard failures in DRAM devices.
Innovation Solution
The implementation of dedicated bank-based error counters and an adaptive virtual lockstep algorithm that uses memory addresses to manage errors, allowing for efficient error correction by mapping out failed banks or ranks and utilizing spare resources, thereby ensuring continued data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If per-rank error counting is used to track memory errors, then error detection capability is provided, but the system cannot accurately determine which specific bank or rank to map out when multiple errors occur
Solution Approach 1:
The patent segments the error counting mechanism from the rank level to the bank level by introducing dedicated bank error counters. Each bank has its own counter that independently tracks error occurrences, enabling precise identification of which specific bank has exceeded the error threshold. This segmentation resolves the contradiction by providing accurate error location identification without requiring complex analysis of per-rank error patterns.
Solution Approach 2:
The patent introduces bank error counters as intermediary structures between the memory banks and the error management logic. These counters serve as mediators that collect and represent error information for each bank, simplifying the error management process. The counters act as intermediaries that translate raw error signals into actionable bank-level error counts, making it straightforward to determine which bank needs to be mapped out.
2Reliability
If adaptive virtual lockstep is used to map out failed banks, then data integrity is maintained, but the system must accurately identify which bank failed to proceed with correction
Solution Approach 1:
The patent implements feedback mechanisms through bank error counters that continuously monitor and report error conditions for each bank. When a bank's error count exceeds the threshold, the feedback signal triggers the adaptive virtual lockstep algorithm to identify and map out that specific bank. This feedback loop ensures reliable data integrity by systematically detecting and responding to bank failures without difficulty in identification.
3Measurement precision
If dedicated bank error counters are implemented, then accurate error tracking per bank is achieved, but additional hardware resources are required
Solution Approach 1:
The patent makes the bank error counters multi-functional by using them for both error tracking and error threshold comparison. The same counter structure serves multiple purposes: counting errors, comparing against thresholds, and triggering correction actions. This universality reduces the need for additional dedicated hardware components, achieving accurate per-bank error tracking while minimizing hardware resource consumption.
Data Source
AI summary
A dedicated bank-based error counter is provided for a respective bank of a Dynamic Random Access Memory (DRAM). The dedicated bank-based error counter for the bank is stored in memory resources. A Basic Input/Output System (BIOS) System Management Interrupt (SMI) handler triggers Adaptive Double Device Data Correction (ADDDC) bank sparing if the error count for the respective bank equals or exceeds a per bank ADDDC threshold.