Banked Register Mapping for Exception Level Switching

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Solution Overview

Problem

Existing data processing systems face inefficiencies when switching between exception levels, as they require multiple versions of system registers, leading to increased complexity and overhead, particularly in handling exceptions and maintaining accurate register states across different privilege levels.

Innovation Solution

A data processing apparatus and method that utilizes a processing element with mapping circuitry to access an architectural register, mapping it to a physical register and employing a register bank with banked versions of the system register, allowing seamless switching between exception levels by storing and copying register contents accordingly, thereby eliminating the need for multiple architectural versions and reducing processing overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple versions of system registers are provided for different exception levels, then the processor can maintain accurate register states across privilege levels, but the device complexity and area increase

Engineering Contradiction:

Improveaccuracy of register statesVSAvoidnumber of register versions

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The system is segmented into banked register sets, where each exception level has its own dedicated bank of system registers. This segmentation allows each bank to maintain independent, accurate register states for its specific exception level, while the overall complexity is managed through systematic organization of these banks

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Instead of providing completely independent physical registers for each exception level, the system uses copying mechanisms where register contents are replicated across banks. The mapping circuitry copies register values between banks as needed, reducing the total number of physical register instances while maintaining the appearance of multiple versions to software

Inventive Principle:

Principle #26Copying

2Reliability

If multiple versions of system registers are provided for different exception levels, then the processor can maintain accurate register states across privilege levels, but the area increases

Engineering Contradiction:

Improveaccuracy of register statesVSAvoidregister bank area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The same physical register bank structure serves multiple exception levels through the mapping circuitry. A single banked register set can be mapped to different exception levels dynamically, allowing the hardware to perform multiple functions (supporting different privilege levels) without requiring proportionally more physical area for each level

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system uses selective copying of register contents between banks rather than maintaining fully independent register sets. This copying approach reduces the total area required while ensuring that each exception level has access to its required register state through the mapping and copying mechanism

Inventive Principle:

Principle #26Copying

3Productivity

If banked registers are used for exception level switching, then processing efficiency is improved, but the device complexity increases

Engineering Contradiction:

Improveprocessing efficiencyVSAvoidmapping circuitry complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The mapping circuitry is designed to automatically select and switch between appropriate register banks based on the current exception level without requiring complex external control logic. The system serves itself by having the exception level information directly drive the bank selection, eliminating the need for additional control circuitry

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The mapping circuitry acts as an intermediary layer between the architectural register interface and the physical banked registers. This intermediary simplifies the overall system by handling the complexity of bank selection and register mapping internally, presenting a simple uniform interface to software while managing the complexity of multiple register banks in the background

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11157277B2Data processing apparatus with respective banked registers for exception levels

Publication Date: 2021.10.26 ARM LTD

AI summary

Data processing apparatus comprises a processing element configured to access an architectural register representing a given system register; mapping circuitry to map the architectural register representing the given system register to a physical register selected from a set of physical registers; a register bank having a set of two or more respective banked versions of the given system register, in which a respective one of the banked versions of the system register is associated with each of a plurality of current operating states of the processing element; in which, when the processing element changes operating state from a first operating state associated with a first one of the banked versions of the system register to a second operating state associated with a second, different, one of the banked versions of the system register, the processing element is configured to store the current contents of the architectural register representing the given system register to the first one of the banked versions of the system register and to copy the contents of the second one of the banked versions of the system register to the architectural register representing the given system register.