Banked SRAM Memory Layout for Power-Balanced Secure Writes
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Solution Overview
Problem
The power consumption differences between writing or reading logic '0' and logic '1' in SRAM memory devices can reveal confidential information, compromising security, and existing methods fail to efficiently maintain data security while optimizing memory utilization.
Innovation Solution
A memory device architecture with multiple banks and a controller that writes and reads data and its inverse, along with Hamming weights, to balance bit counts and power consumption, ensuring identical power usage for logic '0' and '1' operations, thereby enhancing security and utilization efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional SRAM memory is used for data storage, then data transmission speed is improved, but security deteriorates due to power consumption differences between logic '0' and logic '1' operations
Solution Approach 1:
The patent applies inversion by writing the inverse (complement) of the original data to a second memory bank. When data is written as logic '1', its inverse is written as logic '0', and vice versa. This ensures that the bit count of logic '0' and logic '1' becomes balanced, equalizing power consumption patterns and preventing side-channel attacks that exploit power consumption differences to infer confidential information.
Solution Approach 2:
The patent changes the parameter of data representation by introducing Hamming weight encoding. Instead of storing raw data bits directly, the system encodes data with additional parity bits that represent the Hamming weight (number of set bits). This transformation modifies the physical representation of data while maintaining logical equivalence, thereby balancing power consumption characteristics without sacrificing data transmission functionality.
2Object-affected harmful factors
If inverse data is written to balance bit counts, then security is improved, but memory utilization deteriorates due to redundant storage
Solution Approach 1:
The patent segments the memory system into multiple functional banks: a first memory bank for original data, a second memory bank for inverse data, and a third memory bank for Hamming weight information. This segmentation allows each bank to serve a specific purpose, enabling the system to maintain security through inverse data storage while efficiently managing overall memory resources through specialized functional divisions.
Solution Approach 2:
The patent implements multi-functionality by having the third memory bank store Hamming weight information that serves multiple purposes: it enables security through balanced power consumption, facilitates data verification through parity checking, and optimizes memory management by tracking the actual data content characteristics. This single structure performs multiple functions that would otherwise require separate mechanisms.
3Object-affected harmful factors
If Hamming weight encoding is implemented, then data security and power balance are improved, but device complexity increases due to additional memory banks and control logic
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing the Hamming weight of data before the actual data storage operation. The controller computes the Hamming weight in advance and writes it to the third memory bank simultaneously with or before writing the original and inverse data to the first and second banks. This preliminary preparation simplifies subsequent read operations and ensures security is established before data access occurs.
Solution Approach 2:
The patent uses copying by creating a simplified representation of data characteristics in the third memory bank through Hamming weight encoding. Instead of managing the full complexity of balancing inverse data across multiple banks, the system creates a compact copy of the essential security-relevant information (bit count characteristics) that can be used to verify and control the security properties of the stored data without directly managing all the underlying complexity.
Data Source
AI summary
A memory device includes a memory array and a memory controller. The memory array includes a first memory bank, a second memory bank, and a third memory bank. The first memory bank includes a first sub memory bank. The second memory bank includes a second sub memory bank. The memory controller, according to a write command from a host, writes first data from the host to the first memory bank and second data to the second memory bank at the same time, and writes a first Hamming weight of the first data to the third memory bank. The second data is the inverse of the first data.