Minimizing Sidewall Recess in Barrier Layer Etching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of copper and low k dielectric materials in semiconductor manufacturing faces challenges with barrier layer removal, as traditional methods like CMP cause mechanical damage, and advanced thermal gas phase etching struggles with precise end point control, leading to over etching of barrier layers on sidewalls, allowing copper to diffuse into dielectric materials.
Innovation Solution
Introducing a noble-gas-halogen compound gas and a carrier gas into the etching chamber during thermal gas phase etching to control the etching process, reducing the etch rate and preventing over etching of barrier layers on sidewalls by increasing gas molecular collisions and pressure, thereby minimizing sidewall recesses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If thermal gas phase etching is used to remove the barrier layer, then mechanical damage to dielectric materials is avoided, but over etching of barrier layers on sidewalls occurs leading to copper diffusion
Solution Approach 1:
A carrier gas (such as nitrogen or noble gases) is introduced as an intermediary substance to modulate the etching process. The carrier gas mixes with the reactive etching gas to reduce the etching rate and prevent direct over-etching of sidewall barrier layers, while still allowing effective removal of barrier layers on non-recessed areas.
Solution Approach 2:
The etching process parameters are changed by adjusting the ratio of carrier gas to reactive gas, controlling the etching rate through gas composition rather than increasing mechanical force. This allows precise control over etching depth and prevents sidewall barrier layer removal.
2Ease of manufacture
If CMP method is used to remove the barrier layer, then barrier layer removal is achieved, but mechanical force causes damage to low k dielectric materials
Solution Approach 1:
The mechanical CMP process is replaced with a chemical thermal gas phase etching process. Instead of using mechanical polishing forces that damage soft low k dielectric materials, the invention uses controlled chemical reactions between gas phase etchants and the barrier layer to achieve removal without mechanical contact or stress.
3Quantity of substance
If the thickness of barrier layer is reduced, then integration density is improved, but end point control difficulty increases leading to over etching
Solution Approach 1:
The etching process incorporates real-time monitoring and feedback control to detect when the barrier layer on non-recessed areas is fully removed. This feedback mechanism stops or modulates the etching process before it can proceed to remove sidewall barrier layers, providing precise end-point control even for very thin barrier layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively prevents over etching of barrier layers on sidewalls, ensuring accurate removal of barrier layers on non-recessed areas without damaging the dielectric materials, thus maintaining the integrity of the interconnection structures.
Implementation Method 1
The thermal gas phase etching technology utilizes chemical gas to react with the barrier layer at a certain temperature and pressure. The XeF2 gas is adsorbed on the surface of the interconnection structure. Then the XeF2 decomposes into F atoms. The F atoms react with the barrier layer, generating byproduct which is in gas phase.
Implementation Method 2
reducing the etch rate and preventing over etching of barrier layers on sidewalls by increasing gas molecular collisions and pressure
Data Source
AI summary
Provided is a method for removing barrier layer for minimizing sidewall recess. The method comprises the following steps: introduce noble-gas-halogen compound gas and carrier gas into an etching chamber within which a thermal gas phase etching process is being performed for etching a barrier layer (206) on non-recessed areas of an interconnection structure (501); detect an end point of the thermal gas phase etching process (502), if the thermal gas phase etching process reaches the end point end point, then execute the next step; if the thermal gas phase etching process doesn't reach the end point, then return to the previous step; stop introducing the noble-gas-halogen compound gas and the carrier gas to the etching chamber (503).