Engineered Barrier Layer Interface for STT-MRAM Switching Speed

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Solution Overview

Problem

Conventional spin-transfer torque magnetic random access memory (STT-MRAM) faces challenges in achieving high-speed, low-power switching due to an incubation time delay that prevents its use in ultrafast and low-current cache memory applications, resulting in a broad switching time distribution.

Innovation Solution

The introduction of an engineered barrier layer interface in perpendicular magnetic tunnel junctions (pMTJs) that sets an initial angle of magnetization between the free and reference layers by non-conformal interfaces, reducing or eliminating the incubation time delay through plasma treatment and non-physical correlation of the barrier layer interfaces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional spin-transfer torque magnetic random access memory (STT-MRAM) is used, then non-volatility and basic memory functionality are achieved, but incubation time delay occurs that prevents ultrafast switching and broad switching time distribution results

Engineering Contradiction:

Improveswitching speedVSAvoidincubation time delay

Core Design Contradiction:

SpeedVSLoss of time

Solution Approach 1:

The patent applies parameter changes by modifying the barrier layer interface properties through plasma treatment, which alters the magnetization switching characteristics. The plasma treatment changes the interface composition and magnetic properties, enabling reduced incubation time and more deterministic switching behavior, thus improving switching speed while reducing time delay.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent implements local quality by creating asymmetric interface conditions at the barrier layer. The first interface (facing the free layer) is plasma-treated while the second interface (facing the reference layer) maintains different properties. This local differentiation at the interfaces enables precise control over magnetization switching, reducing incubation time delay and improving switching speed.

Inventive Principle:

Principle #3Local quality

2Ease of operation

If write current exceeds critical switching current in conventional MRAM, then magnetization direction changes, but broad switching time distribution occurs reducing switching precision

Engineering Contradiction:

Improvemagnetization switchingVSAvoidswitching time distribution

Core Design Contradiction:

Ease of operationVSManufacturing precision

Solution Approach 1:

The plasma treatment of the barrier layer interface changes the magnetic anisotropy and switching characteristics, leading to a narrower switching time distribution. By modifying the interface properties, the patent achieves more deterministic switching behavior with reduced variability, improving manufacturing precision while maintaining ease of operation.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent replaces the conventional approach of relying on current magnitude alone for switching control with a modified interface structure that provides inherent switching control. The plasma-treated interface creates more uniform switching characteristics, reducing the broad distribution in switching times and improving precision without complicating the operation.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Speed

If STT-MRAM is designed for high speed operation, then switching speed improves, but current consumption increases reducing low-power capability

Engineering Contradiction:

Improveswitching speedVSAvoidcurrent consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The plasma treatment of the barrier layer interface modifies the magnetic properties to enable faster switching at lower current densities. By changing the interface composition and magnetic anisotropy, the patent achieves improved switching speed without the need to increase current consumption, thus resolving the trade-off between speed and power consumption.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables high-speed switching with low current consumption, making STT-MRAM suitable for cache memory applications by reducing the incubation time delay and improving switching efficiency.

Implementation Method 1

The first interface may not physically correlate with the second interface... induces an initial angle of magnetization between the reference layer and the free layer

Methodology Applied

Scientific EffectMagnetization: Magnetism

Implementation Method 2

treating an exposed surface of the barrier layer... through plasma treatment and non-physical correlation of the barrier layer interfaces

Methodology Applied

Scientific EffectPlasma treatment: Plasma

Data Source

PatentUS10431734B2Engineered barrier layer interface for high speed spin-transfer torque magnetic random access memory

Publication Date: 2019.10.01 QUALCOMM INC

AI summary

A perpendicular magnetic tunnel junction may include a free layer, a reference layer, and a barrier layer. The barrier layer may be arranged between the free layer and the reference layer. The barrier layer may include a first interface and a second interface. The first interface may face the free layer, and a second interface may face the reference layer. The first interface may not physically correlate with the second interface.