Semiconductor Barrier Layer Nitridation for Thin Fluorine Blocking

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Solution Overview

Problem

In semiconductor manufacturing, existing barrier layer technologies face challenges in reducing thickness while maintaining resistivity and preventing fluorine impurity leakage, especially as the number of metal lines increases in 3D memory structures.

Innovation Solution

A method involving pulse-type nitridation operations using high ammonia pressure and short treatment times, combined with purge operations, is employed during atomic layer deposition to form a barrier layer, effectively removing Cl atoms and improving barrier properties by repeating ammonia treatments and purges.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the barrier layer thickness is reduced to improve device performance, then the signal propagation delay is improved, but the ability to prevent fluorine impurity leakage deteriorates

Engineering Contradiction:
Improvesignal propagation speedVSAvoidbarrier layer leakage prevention
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent changes the chemical composition parameters of the barrier layer by incorporating nitrogen through nitridation treatment, transforming the barrier material from conventional metals to metal nitrides. This parameter change enables the barrier layer to maintain effective leakage prevention with reduced thickness, as metal nitrides provide superior barrier properties against fluorine diffusion compared to traditional metal materials.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite barrier structure by combining metal precursor layers with nitrogen-containing compounds through nitridation. The resulting metal nitride composite material exhibits enhanced barrier properties that allow thickness reduction while maintaining or improving leakage prevention capabilities against fluorine impurities.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If conventional barrier layer materials and methods are used, then the manufacturing process is simple, but the barrier layer cannot effectively prevent fluorine impurity leakage in advanced 3D memory structures

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidfluorine impurity leakage prevention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent modifies the deposition process parameters by implementing pulse-type nitridation operations with high ammonia pressure and short treatment times. This parameter change transforms the conventional single-step deposition into a multi-stage process that incorporates in-situ nitridation, enabling the formation of metal nitride barrier layers with superior leakage prevention properties while maintaining process integration efficiency.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent achieves continuous useful action by integrating the nitridation treatment directly into the deposition process. The pulse-type nitridation operations are performed immediately after precursor deposition without breaking vacuum, ensuring continuous transformation of the barrier layer material properties and eliminating the need for separate nitridation processing steps.

Inventive Principle:
Principle #20Continuity of useful action

3Quantity of substance

If multiple metal lines are stacked in 3D memory structures, then the memory capacity is increased, but the difficulty of maintaining barrier layer performance increases

Engineering Contradiction:
Improvememory capacityVSAvoidbarrier layer performance consistency
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent employs periodic pulse-type nitridation operations during the deposition process for each metal line. This periodic treatment ensures that each barrier layer in the multi-layer 3D memory structure receives consistent nitrogen incorporation, maintaining uniform barrier properties across all stacked metal lines and ensuring performance consistency throughout the three-dimensional structure.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent performs preliminary nitridation treatment during the deposition process itself, before the metal lines are fully formed and stacked. This preliminary action ensures that each barrier layer is pre-treated with nitrogen to establish optimal barrier properties before subsequent processing steps, maintaining performance consistency across multiple stacked structures.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach balances thickness reduction and leakage prevention, enhancing the continuity and barrier properties of the barrier layer, thereby ensuring reliable performance in 3D memory devices.

Implementation Method 1

The dielectric layer is exposed to a precursor having a first metal

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Implementation Method 2

a pulse-type nitridation operation is performed. The pulse-type nitridation operation includes performing a first ammonia treatment

Methodology Applied
Scientific EffectNitridation: Nitriding

Implementation Method 3

A first purge operation is performed, a second ammonia treatment is performed after the first purge operation, and a second purge operation is performed after the second ammonia treatment

Methodology Applied
Scientific EffectGas Purge:

Data Source

PatentUS12062573B2Method for forming barrier layer in semiconductor structure
Publication Date: 2024.08.13 YANGTZE MEMORY TECH CO LTD
  • US12062573B2 patent drawing
  • US12062573B2 patent drawing
  • US12062573B2 patent drawing

AI summary

A method for forming a barrier layer in a semiconductor structure is disclosed. A substrate having a dielectric layer is provided. The dielectric layer is exposed to a precursor having a first metal, and a first ammonia treatment is performed. A first purge operation is performed, a second ammonia treatment is performed after the first purge operation, and a second purge operation is performed after the second ammonia treatment to form the barrier layer on the dielectric layer.