Barrier-Less Via Structure for Low-Resistance Interconnects
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Solution Overview
Problem
Advanced IC technology nodes face challenges with increased contact resistance in multilayer interconnects, leading to performance degradation and yield loss due to poor adhesion of via plug materials to dielectric layers, causing damage from CMP slurries and planarization-induced delamination.
Innovation Solution
The implementation of low-resistance vias and metal line structures with barrier layers on sidewalls to prevent CMP slurry penetration and adhesion issues, using self-assembled monolayers and bottom-up deposition techniques to selectively form barrier layers and protect underlying interconnect features.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If barrier layers are added to prevent CMP slurry penetration, then protection improves, but interconnect resistance increases
Solution Approach 1:
The via structure uses a composite material system consisting of a thin barrier layer (5-20 nm) made of materials like tantalum, tantalum nitride, or titanium nitride, combined with a low-resistance via plug material (tungsten, cobalt, or copper). The barrier layer provides CMP slurry protection while the via plug material maintains low interconnect resistance, resolving the contradiction between protection and conductivity.
2Productivity
If feature size is scaled down to increase functional density, then productivity improves, but contact resistance increases
Solution Approach 1:
The barrier layer is deposited in advance before the via plug material, creating a protective interface that prevents adhesion and CMP slurry damage. This preliminary action ensures that even as feature sizes scale down to 10nm and below, the via structure maintains reliable electrical contact without increased resistance, enabling continued productivity improvement through scaling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces interconnect resistance, protects underlying features from chemical damage, and enhances the reliability of IC devices by preventing slurry penetration and maintaining low resistance.
Implementation Method 1
a self-assembled monolayer is formed over the exposed contact feature to inhibit formation of the barrier layer
Implementation Method 2
a self-assembled monolayer is formed over the exposed contact feature
Implementation Method 3
barrier layers on sidewalls to prevent CMP slurry penetration
Implementation Method 4
bottom-up deposition techniques to selectively form barrier layers
Data Source
AI summary
Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a second contact feature over the first contact feature, a barrier layer between the second dielectric layer and the second contact feature, and a liner between the barrier layer and the second contact feature. An interface between the first contact feature and the second contact feature includes the liner but is free of the barrier layer.