Barrier with Local Spinning for Thread Coordination
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Solution Overview
Problem
Conventional barrier synchronization mechanisms, such as sense reversing barriers and combining tree barriers, incur significant memory overhead and structure footprint, and fail to efficiently manage thread coordination in parallel algorithms, especially when dealing with staggered thread arrivals and cache locality.
Innovation Solution
A barrier mechanism utilizing a bit vector embedded as a pointer, which functions as either a counter or a pointer to a block list, allowing threads to spin locally on memory locations and efficiently manage thread arrivals, reducing static storage and runtime expansion by using stack blocks for thread coordination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional barrier mechanisms (sense reversing barrier, combining tree barrier) are used for thread synchronization, then thread coordination is achieved, but memory overhead and structure footprint become significant
Solution Approach 1:
The barrier mechanism is segmented into a compact core structure (bit vector as pointer) and optional expansion (block list). The core structure handles basic barrier functionality with minimal memory, while the block list is only allocated when needed for staggered thread arrivals. This segmentation resolves the contradiction by providing a lightweight default implementation that only expands when necessary.
Solution Approach 2:
The barrier structure dynamically transitions between a compact counter state and an expanded block list state based on operational needs. When threads arrive in a compact group, the counter state suffices. When staggered arrivals occur, the system dynamically allocates block list entries. This dynamic behavior allows the structure to maintain small footprint most of the time while providing full functionality when needed.
2Reliability
If threads are put to sleep to wait for barrier completion, then thread coordination is achieved, but fixed cost involving OS context switch and swap time is incurred
Solution Approach 1:
Instead of immediate blocking, threads engage in periodic spinning at the barrier, checking for completion status at regular intervals. This periodic action allows threads to remain in a lightweight state rather than immediately transitioning to sleep, reducing the frequency and cost of context switches while still achieving reliable coordination when all threads are present.
Solution Approach 2:
The barrier mechanism performs preliminary actions by pre-allocating minimal structure (bit vector as pointer) and preparing threads to spin locally before blocking. This preliminary setup reduces the need for heavy OS intervention during normal operation, as the barrier can handle compact thread groups without requiring full context switches for each thread arrival.
3Reliability
If threads spin on global memory locations at the barrier, then synchronization is achieved, but cache locality deteriorates due to cache line pinging
Solution Approach 1:
Each thread spins on its own local memory location (local stack variable) rather than a shared global location. This local quality approach ensures that spinning threads do not cause cache line pinging, as each thread's spin variable resides in its own cache line. The barrier achieves synchronization by exchanging pointers to these local variables, maintaining both reliability and cache efficiency.
4Reliability
If a barrier structure is designed to handle all possible thread arrival patterns, then robustness is achieved, but storage requirements and complexity increase
Solution Approach 1:
The barrier structure is segmented into a simple counter component and an optional block list component. The counter handles the common case of compact thread arrivals, while the block list is only activated when staggered arrivals require it. This segmentation allows the structure to be simple and robust for typical cases while providing extended functionality only when necessary, avoiding unnecessary complexity.
Solution Approach 2:
The barrier mechanism achieves universality by using a single bit vector-as-pointer structure that can function in multiple modes: as a counter for compact arrivals, as a pointer to block list for staggered arrivals, and as a synchronization primitive for thread coordination. This multi-functionality provides robust handling of various arrival patterns without requiring separate structures for each case, thereby reducing overall complexity.
Data Source
AI summary
A barrier with local spinning. The barrier is described as a barrier object having a bit vector embedded as a pointer. If the vector bit is zero, the object functions as a counter; if the vector bit is one, the object operates as a pointer to a stack. The object includes the total number of threads required to rendezvous at the barrier to trigger release of the threads. The object points to a stack block list that describes each thread that has arrived at the barrier. Arriving at the barrier involves reading the top stack block, pushing onto the list a stack block for the thread that just arrived, decrementing the thread count, and spinning on corresponding local memory locations or timing out and blocking. When the last thread arrives at the barrier, the barrier is reset and all threads at the barrier are awakened for the start of the next process.