Barrier-Less Interconnect Vias for Low Resistance and CMP Protection

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Solution Overview

Problem

Advanced IC technology nodes face challenges with increased contact resistance in multilayer interconnects, leading to performance degradation and yield loss due to poor adhesion of via plug materials to dielectric layers, which results in damage from CMP slurries and higher resistance in conventional barrier-free vias.

Innovation Solution

The implementation of low-resistance vias and metal line structures with barrier layers on sidewalls to prevent CMP slurry penetration and adhesion issues, using self-assembled monolayers and bottom-up deposition techniques to selectively form barrier layers and protect underlying interconnect features.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If barrier-free vias are used to reduce contact resistance, then interconnect resistance decreases, but adhesion between via plug material and dielectric layer deteriorates, causing damage from CMP slurries

Engineering Contradiction:
Improveinterconnect resistanceVSAvoidCMP slurry damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The via structure is segmented into distinct functional layers: a barrier-free via plug for low resistance, and a separate liner layer for adhesion and CMP slurry protection. This segmentation allows each layer to optimize its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The liner layer acts as an intermediary between the via plug material and the dielectric layer, providing the necessary adhesion and protection against CMP slurry damage while allowing the via plug to maintain low resistance. The liner mediates the interaction between conflicting requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If conventional via structures with barrier layers are used, then adhesion and CMP slurry protection are improved, but interconnect resistance increases

Engineering Contradiction:
ImproveCMP slurry protectionVSAvoidinterconnect resistance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The barrier layer property is applied locally only where needed for adhesion and CMP slurry protection (at the interface with the dielectric layer), while the via plug interior remains barrier-free to maintain low resistance. This local application of barrier properties resolves the contradiction.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The via structure is divided into functional segments: the liner/barrier layer provides protection at the critical interface, while the via plug provides low-resistance conduction path. This segmentation allows optimization of each region for its specific purpose.

Inventive Principle:
Principle #1Segmentation

3Productivity

If IC feature size is scaled down to increase functional density, then production efficiency and cost are improved, but contact resistance in multilayer interconnects increases

Engineering Contradiction:
Improveproduction efficiencyVSAvoidcontact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The via structure parameters are changed by eliminating the barrier layer from the via plug interior and replacing it with a liner layer, enabling lower resistance while maintaining adhesion and CMP slurry protection. This parameter change allows continued scaling without resistance penalties.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The via structure uses composite material composition: a conductive via plug material (such as tungsten, cobalt, or copper) combined with a liner material that provides adhesion and protection. This composite structure achieves both low resistance and protection against CMP damage.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces interconnect resistance, prevents damage from CMP processes, and enhances the yield and reliability of IC devices by ensuring better adhesion and protection of underlying structures.

Implementation Method 1

forming a self-assembled monolayer over the contact feature

Methodology Applied
Scientific EffectSelf-assembly: Self-Assembly

Implementation Method 2

The self-assembled monolayer selectively forms on the contact feature

Methodology Applied
Scientific EffectAdsorption: Adsorption

Implementation Method 3

depositing the barrier layer over the workpiece

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 4

depositing the barrier layer over the workpiece

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 5

poor adhesion of via plug materials to dielectric layers

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS11848190B2Barrier-less structures
Publication Date: 2023.12.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11848190B2 patent drawing
  • US11848190B2 patent drawing
  • US11848190B2 patent drawing

AI summary

Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a second contact feature over the first contact feature, a barrier layer between the second dielectric layer and the second contact feature, and a liner between the barrier layer and the second contact feature. An interface between the first contact feature and the second contact feature includes the liner but is free of the barrier layer.