Base Die ECC Processing for Memory Data Integrity

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Solution Overview

Problem

In semiconductor memory systems, the lack of error checking and correction functionality in the base die leads to increased die area requirements and performance issues for the processor and memory die, as these components must handle error checking and correction tasks, affecting data transmission accuracy and rate.

Innovation Solution

The base die is configured to perform error checking and correction processing, including ECC encoding and decoding, and can choose to participate in these processes based on a selection signal, sharing this functionality with the processor and reducing the die area requirements by implementing ECC error checking and correction mechanisms like Reed Solomon or Hamming codes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the base die does not perform error checking and correction processing, then the processor and memory die must handle these tasks, but this increases die area requirements and reduces data transmission accuracy

Engineering Contradiction:
Improvedata transmission accuracyVSAvoiddie area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The base die acts as an intermediary component between the processor and memory die, performing error checking and correction processing on data before it is written to or read from the memory die. This mediator role allows the processor and memory die to focus on their primary functions while the base die handles error correction, improving data transmission accuracy without significantly increasing the die area of the main components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The error checking and correction functionality is segmented from the processor and memory die and placed in the base die. This segmentation allows each component to be optimized for its specific function: the processor for computation, the memory die for storage, and the base die for error correction, thereby reducing the overall die area requirements while improving reliability.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the base die performs error checking and correction processing, then data transmission accuracy improves, but the device complexity increases

Engineering Contradiction:
Improvedata transmission accuracyVSAvoiderror checking and correction mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The base die is designed with multi-functionality, serving both as a data transmission interface and as an error checking and correction unit. By combining these functions in a single component, the system avoids the need for separate error correction devices, thereby improving data transmission accuracy without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The base die performs error checking and correction on data automatically as it passes through the system, without requiring external intervention or additional complex control mechanisms. This self-service approach simplifies the overall system architecture while maintaining high data transmission accuracy.

Inventive Principle:
Principle #25Self-service

3Reliability

If multiple ECC encoding processing stages are implemented, then error correction capability is enhanced, but the processing time and complexity increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The base die performs preliminary error checking and correction processing on data before it is written to the memory die. By conducting error correction in advance, during the writing phase, the system prepares corrected data for storage, which reduces the need for extensive error correction processing during read operations, thereby enhancing error correction capability while minimizing processing time delays.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11645151B1Base die, memory system, and semiconductor structure
Publication Date: 2023.05.09 CHANGXIN MEMORY TECH INC
  • US11645151B1 patent drawing
  • US11645151B1 patent drawing
  • US11645151B1 patent drawing

AI summary

A base die is configured to: receive a first data and a first encoded data in a writing phase and perform a first error checking and correction processing, where the first encoded data is obtained by performing a first error correction code (ECC) encoding processing on the first data; perform a second ECC encoding processing on the first data on which the first error checking and correction processing has been performed, to generate a second encoded data; and choose to transmit a to-be-written data to a memory die based on a selection signal in the writing phase, where the to-be-written data is either an initial data or a second data; and choose to transmit the initial data or third data in a reading phase based on a selection signal.