Base Die Error Checking Correction Memory System
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Solution Overview
Problem
In semiconductor memory systems, the lack of error checking and correction capabilities in the base die leads to increased pressure on the die areas of the processor and memory die, affecting performance and storage accuracy.
Innovation Solution
Incorporating a base die with error checking and correction functions, which performs ECC encoding and decoding processes, allowing it to participate in data transmission error checking and correction, thereby alleviating the burden on the processor and memory die.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error checking and correction functions are implemented in the processor and memory die, then data storage accuracy is improved, but die area increases and performance is affected
Solution Approach 1:
The patent introduces a base die as an intermediary component between the processor and memory die. The base die performs ECC encoding and decoding functions, acting as a mediator that handles error checking and correction without requiring the processor or memory die to implement these functions directly. This separates the error correction functionality from the main computing and storage components, preserving their die area while maintaining data accuracy.
Solution Approach 2:
The patent divides the memory system into three separate components: processor, base die, and memory die. The error checking and correction functions are segmented and assigned to the base die, while the processor focuses on computation and the memory die focuses on storage. This segmentation allows each component to be optimized for its specific function without the overhead of implementing error correction logic in all components.
2Reliability
If error checking and correction functions are implemented in the processor and memory die, then data storage accuracy is improved, but performance is affected
Solution Approach 1:
The base die serves as a dedicated intermediary for error correction operations, allowing the processor and memory die to communicate without being burdened by ECC processing. This mediator approach ensures that error checking and correction are performed efficiently in a dedicated component, preventing performance degradation in the main processor and memory operations.
Solution Approach 2:
The base die is designed to autonomously perform ECC encoding and decoding operations without requiring intervention from the processor or memory die. This self-service capability allows error correction to occur automatically as data passes through the base die, maintaining system performance while ensuring data accuracy.
3Reliability
If the base die receives and transmits multiple types of data (first data, first encoded data, second encoded data), then error checking and correction capability is improved, but device complexity increases
Solution Approach 1:
The base die is designed as a universal component that handles multiple data types (first data, first encoded data, second encoded data) through a single integrated interface. This multi-functional design consolidates what could be multiple separate components into one base die, managing the complexity of handling various data formats while maintaining improved error checking and correction capabilities.
Data Source
AI summary
A base die is configured to receive a first data and a first encoded data in a writing phase, where the first encoded data is obtained by performing a first error correction code (ECC) encoding processing on the first data, perform a second ECC encoding processing on the first data and the first encoded data to generate a second encoded data, and transmit a second data to a memory die in the writing phase, where the second data includes the first data, the first encoded data, and the second encoded data. The base die is further configured to receive the second data from the memory die in a reading phase, perform a first error checking and correction processing, and transmit a third data in the reading phase.