Base Die RF Filter Structures for Stacked Chiplet Noise Suppression

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Solution Overview

Problem

Multi-chip packaging in electronic systems experiences significant RF noise issues due to switching activities, which can reduce wireless communication throughput and cause interference between chiplets and neighboring electronic packages, with traditional RFI mitigation techniques being difficult to integrate and costly.

Innovation Solution

Incorporating RF filtering solutions, such as common mode choke filters and notch filters, directly into the base substrate of electronic packages, utilizing metal-insulator-metal capacitors and spiral traces, along with Faraday's cages for RF shielding, to minimize RF interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If traditional RFI mitigation techniques (RF capacitors) are used, then RF noise suppression is achieved, but integration into packages is difficult due to height constraints

Engineering Contradiction:

ImproveRF noise suppressionVSAvoidintegration difficulty

Core Design Contradiction:

Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The patent merges the RFI mitigation function directly into the base die structure by integrating common mode choke filters and Faraday cages into the substrate layers, eliminating the need for separate RF capacitor components and resolving the integration difficulty while maintaining RF noise suppression effectiveness

Inventive Principle:

Principle #5Merging (Combining)

2Object-affected harmful factors

If discrete RF shielding is used, then RF noise suppression is achieved, but manufacturing cost increases significantly

Engineering Contradiction:

ImproveRF noise suppressionVSAvoidmanufacturing cost

Core Design Contradiction:

Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The patent combines multiple RFI mitigation functions (common mode choke filtering, Faraday cage shielding) into a single integrated base die structure, eliminating the need for expensive discrete RF shielding components and enabling cost-effective high volume manufacturing while maintaining effective RF noise suppression

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The base die structure provides its own RFI mitigation capabilities through integrated common mode choke filters and Faraday cages, making the system self-shielding and eliminating the need for additional expensive discrete shielding components

Inventive Principle:

Principle #25Self-service

3Productivity

If multiple chiplets are packaged in close proximity, then packaging density is improved, but RF noise interference between chiplets increases

Engineering Contradiction:

Improvepackaging densityVSAvoidRF noise interference

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the base die into multiple functional layers with dedicated RFI mitigation structures (common mode choke filters in some layers, Faraday cages in others) that provide localized noise suppression between adjacent chiplets, enabling high packaging density while maintaining low RF interference

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent applies different RFI mitigation techniques (common mode choke filters for power/ground networks, Faraday cages for signal isolation) to different regions and layers of the base die, providing targeted local quality enhancement that suppresses RF noise between closely packed chiplets while maintaining high packaging density

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

These solutions effectively reduce RF noise, enhancing wireless communication performance and compatibility between chiplets and other electronic components, while being cost-effective and compatible with high-density packaging formats.

Implementation Method 1

a first common mode choke filter and a second common mode choke filter, each having an input and an output, respectively

Methodology Applied

Scientific EffectElectromagnetic induction: Electromagnetic Induction

Implementation Method 2

a first notch filter and a second notch filter, each having an input and an output, respectively

Methodology Applied

Scientific EffectResonance: Resonance

Implementation Method 3

Faraday's cages for RF shielding

Methodology Applied

Scientific EffectFaraday cage effect: Faraday Cage

Data Source

PatentUS12057433B2EM and RF mitigation silicon structures in stacked die microprocessors for die to platform and die-die RF noise suppression

Publication Date: 2024.08.06 INTEL CORP

AI summary

Embodiments disclosed herein include electronic packages and their components. In an embodiment, an electronic package comprises a package substrate and a base die over the package substrate. In an embodiment, the electronic package further comprises a plurality of chiplets over the base die. In an embodiment, the base die comprises a substrate, a first metal layer and a second metal layer between the substrate and the plurality of chiplets, and a third metal layer and a fourth metal layer between the package substrate and the substrate. In an embodiment, a filter is integrated into one or more layers of the base die.