Base Die Thermal Pathways in 3D Multichip Assemblies

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Solution Overview

Problem

Current thermal management solutions for multichip composite devices with 3D stacked dies are inadequate, leading to inefficient heat removal from base dies, which can cause device damage or performance throttling due to high power densities and low thermal conductivity of dielectric fill materials.

Innovation Solution

Incorporating dummy dies with higher thermal conductivity than the inorganic dielectric material, such as silicon or thermoelectric cooling dies, and using high thermal conductivity bonding layers or metal vias to create enhanced thermal pathways for heat removal from the base die to the handle die.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If dummy dies with higher thermal conductivity are incorporated, then heat transfer from base die is improved, but device complexity increases

Engineering Contradiction:
Improveheat transfer efficiencyVSAvoiddevice complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent introduces dummy dies as intermediary thermal management components between the base die and handle die. These dummy dies serve as thermal mediators with higher thermal conductivity than the dielectric material, creating dedicated thermal pathways that improve heat transfer from the base die without requiring fundamental redesign of the existing 3D stacked architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dummy dies are strategically positioned in specific locations where thermal management is most critical - directly adjacent to the base die in regions with high power density. This localized approach enhances thermal conductivity only where needed, rather than requiring uniform thermal enhancement throughout the entire device structure.

Inventive Principle:
Principle #3Local quality

2Power

If high power densities are used to improve performance, then computing device performance is improved, but thermal management becomes inadequate causing device damage or throttling

Engineering Contradiction:
Improveoperational power capabilityVSAvoidthermal management adequacy
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The dummy dies are incorporated into the device architecture in advance, before high power density operation is required. This preliminary thermal pathway establishment ensures that when the device operates at high power densities, the thermal management infrastructure is already in place to handle the increased heat generation, preventing thermal runaway or throttling.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the thermal conductivity parameter of the thermal pathways by introducing dummy dies with higher thermal conductivity than the standard dielectric material. This parameter change enables the system to dissipate heat more effectively at high power densities, allowing the device to operate at higher power levels without compromising reliability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly improves heat transfer from the base die, reducing temperatures and enabling higher operational power capabilities by providing more efficient thermal management.

Implementation Method 1

the dummy die comprises a greater thermal conductivity than the inorganic dielectric material

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

such as silicon or thermoelectric cooling dies

Methodology Applied
Scientific EffectThermoelectric cooling: Peltier Effect

Data Source

PatentUS20240063089A1Thermal management of base dies in multichip composite devices
Publication Date: 2024.02.22 INTEL CORP
  • US20240063089A1 patent drawing
  • US20240063089A1 patent drawing
  • US20240063089A1 patent drawing

AI summary

Microelectronic devices, assemblies, and systems include a multichip composite device having one or more integrated circuit dies bonded to a base die and an inorganic dielectric material adjacent the integrated circuit dies and over the base die. The multichip composite device includes a dummy die, dummy vias, or integrated fluidic cooling channels laterally adjacent the integrated circuit dies to conduct heat from the base die.