5G Base Station L1 Partitioning Across PS and PL Resources
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Solution Overview
Problem
The implementation of 5G NR wireless communication technology's physical layer (L1) in base stations faces challenges due to computationally intensive and time-critical data processing requirements, necessitating efficient use of processing resources and memory, particularly in heterogeneous computing platforms.
Innovation Solution
A system and method that segregates L1 modules between a processing system (PS) and programmable logic (PL) to optimize resource usage, shifting certain processes like PDSCH and PDCCH demodulation reference signal generation to PS and others like PBCH data processing to PL, enabling parallel processing and efficient memory usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If all L1 channels and modules are implemented over hardware (PL), then processing speed and time-critical requirements are met, but processing resources, complexity, and time consumption increase hugely
Solution Approach 1:
The patent segments the L1 processing functions into two distinct parts: time-critical channels (SSB, PBCH, PDCCH, and their DMRS) are implemented in programmable logic (PL) hardware for high-speed processing, while non-time-critical channels (PDSCH, PUSCH, PUCCH, and their DMRS) are implemented in processing system (PS) software. This segmentation resolves the contradiction by assigning only the necessary time-critical functions to hardware, reducing overall system complexity while maintaining required processing speed.
2Productivity
If L1 modules are implemented in hardware (PL), then processing efficiency for time-critical channels is improved, but memory usage increases
Solution Approach 1:
The patent divides memory requirements by implementing only the necessary L1 channels in hardware. By placing only time-critical channels (SSB, PBCH, PDCCH with DMRS) in PL and keeping data-heavy channels (PDSCH, PUSCH, PUCCH with DMRS) in PS, the hardware memory footprint is significantly reduced while processing efficiency for time-critical functions is maintained.
3Productivity
If more L1 channels are processed in parallel, then throughput is improved, but processing resources and complexity increase
Solution Approach 1:
The patent segments processing resources by channel type, allowing parallel processing of time-critical channels in PL and data-intensive channels in PS. This enables throughput improvement through parallelism while optimizing resource usage by matching each channel type with the most appropriate processing platform.
Solution Approach 2:
The processing system (PS) component is designed to handle multiple L1 channel types (PDSCH, PUSCH, PUCCH, and their DMRS) that are not time-critical. This multi-functional PS implementation allows the system to process diverse channel types using a single flexible platform, improving throughput without proportionally increasing dedicated hardware resources.
Data Source
AI summary
The present disclosure provides a system and method for implementing a physical layer architecture of base station in a heterogeneous platform, which involves time critical, computationally intensive, and huge data processing modules or processes. There are various channels in L1 which require time bound processing and each channel may be present multiple times. Implementation of all these channels over hardware requires huge amount of processing resources, complexity, and time. The system describes an overall L1 architecture in the heterogeneous computing platform, segregating the implementation of different modules or processes of L1 between Processing System (PS) and Programmable Logic (PL) system in an intelligent way to efficiently use the PL resources as well as PS core processing capabilities. The system also details a way of storing the output data of each protocol data unit (PDU) in bits instead of modulated complex samples, thereby saving memory.