Base Station TDD Switching for URLLA Latency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In 5G communication systems, existing technologies face challenges in simultaneously achieving low latency for ultrareliable low latency communications (URLLC) while maintaining high transmission efficiency for large volume data, as current Time Division Duplex (TDD) configurations often lead to increased waiting times for ultralow delay data due to imbalanced uplink and downlink signal ratios.
Innovation Solution
A base station that dynamically switches between uplink and downlink periods in a time division manner, using processor circuitry to generate and transmit control information for canceling downlink signals and reallocating resources to ensure timely transmission of ultralow delay data without compromising large volume data efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a UL/DL configuration deviating to one signal is used to efficiently transmit large volume data, then transmission efficiency is improved, but waiting time for ultralow delay data increases
Solution Approach 1:
The patent applies dynamic switching between different UL/DL configurations based on traffic type. The base station determines whether to use a configuration optimized for large volume data transmission or one optimized for ultralow delay data transmission by dynamically changing the TDD configuration pattern. This allows the system to adapt its resource allocation in real-time according to the specific transmission needs, resolving the contradiction between transmission efficiency and waiting time by making the configuration dynamic rather than static.
Solution Approach 2:
The patent changes the parameter of TDD configuration pattern based on traffic requirements. By switching between different UL/DL configuration types (e.g., from downlink-heavy configuration to uplink-heavy configuration or alternating configuration), the system adjusts the timing parameters to match the specific data transmission needs. This parameter change enables the system to optimize for either transmission efficiency or low latency depending on the current traffic condition.
2Loss of time
If a UL/DL configuration with alternating uplink and downlink signals is used to satisfy low latency requirements, then waiting time is reduced, but transmission efficiency deteriorates
Solution Approach 1:
The system dynamically selects between alternating UL/DL configuration and downlink-heavy configuration based on the presence of ultralow delay data. When ultralow delay data is detected, the system switches to alternating configuration to reduce waiting time. When no such data is present, it uses downlink-heavy configuration to maximize transmission efficiency. This dynamic adaptation resolves the contradiction by making the configuration responsive to actual traffic conditions rather than fixed.
Solution Approach 2:
The patent changes the TDD configuration parameter based on traffic type detection. The base station monitors for ultralow delay data and adjusts the UL/DL configuration pattern accordingly - using alternating patterns when low latency is required and downlink-heavy patterns when transmission efficiency is prioritized. This parameter adjustment allows the system to optimize performance for the current traffic condition.
Data Source
AI summary
A base station that switches between uplink periods and downlink periods in a time division manner and performs communication, the base station includes a memory; processor circuitry coupled to the memory, wherein the processor circuitry is configured to: notify of allocation information indicating a combination of resources for time division duplex (TDD) uplink (UL) or downlink (DL) configuration at a predetermined interval; and generate control information indicating cancelation of transmission of a downlink signal, wherein the canceled transmission is configured to be performed by using one of the resources designated by the allocation information, and wherein the processor circuitry is further configured to transmit the generated control information.


