Baseband Chip Buffer Segmentation for Parallel Demodulation

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Solution Overview

Problem

The existing LTE communication systems require significant memory space in baseband chips for demodulating and decoding downlink channels, particularly due to the need to cache soft-bit data from multiple subframes, which leads to memory inefficiencies and potential delays.

Innovation Solution

A method and apparatus that suspend demodulation when the buffer space is full and resume when sufficient space is available, storing demodulated data in separate buffer regions corresponding to different code words, allowing demodulation and decoding to proceed in parallel, thereby optimizing memory usage and reducing delays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If soft-bit data from multiple subframes is cached in buffer space for parallel demodulation and decoding, then real-time processing performance is improved, but memory space occupation increases significantly

Engineering Contradiction:
Improvereal-time processing performanceVSAvoidmemory space occupation
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The buffer space is segmented into multiple buffer regions, with each buffer region corresponding to a specific code word (CW). This segmentation allows the system to store demodulated data from multiple subframes in an organized manner, enabling parallel processing while controlling memory usage by only caching necessary data portions rather than entire subframes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary demodulation of resource element data and stores the demodulated data in the buffer space before decoding. By preparing the demodulated data in advance in organized buffer regions, the system enables subsequent decoding operations to proceed in parallel without waiting for complete subframe accumulation, thus improving real-time performance while managing memory efficiently.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If demodulation and decoding are performed in parallel across subframes, then system throughput is improved, but buffer management complexity increases

Engineering Contradiction:
Improvesystem throughputVSAvoidbuffer management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

By dividing the buffer space into distinct buffer regions for different code words, the system simplifies buffer management. Each buffer region can be independently managed and accessed, making it easier to track and process data from multiple subframes in parallel without requiring complex global buffer management mechanisms.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The buffer regions serve as intermediary storage structures between the demodulation process and the decoding process. These structured buffer regions facilitate the parallel operation of demodulation and decoding by providing organized access points for both processes, thereby reducing the complexity of coordinating these operations across multiple subframes.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If buffer space is allocated for accumulating complete subframes before decoding, then decoding accuracy is maintained, but processing delay increases

Engineering Contradiction:
Improvedecoding accuracyVSAvoidprocessing delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary demodulation and stores results in buffer regions before decoding. This allows decoding to start as soon as sufficient demodulated data is available in the buffer regions, rather than waiting for complete subframe accumulation, thus reducing processing delay while maintaining decoding accuracy through proper data preparation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically manages the buffer regions, allocating and utilizing buffer space as demodulated data becomes available. This dynamic approach allows the system to proceed with decoding when sufficient data is present in the buffer regions without requiring fixed subframe-based timing, thereby reducing processing delay while ensuring adequate data is available for accurate decoding.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9054837B2Demodulation method and apparatus, decoding method and apparatus and baseband chip in communication system
Publication Date: 2015.06.09 SPREADTRUM COMMUNICATION (SHANGHAI) CO LTD
  • US9054837B2 patent drawing
  • US9054837B2 patent drawing
  • US9054837B2 patent drawing

AI summary

The present disclosure provides a demodulation method and apparatus, a decoding method and apparatus and a baseband chip in a communication system. The decoding method includes: when demodulated data in a buffer space is enough to form a second predetermined number of CB data, reading the demodulated data to form the second predetermined number of CB data from the buffer space; decoding the second predetermined number of CB data. The buffer space includes a plurality of buffer regions corresponding to different CWs. Each of buffer regions store the demodulated data belonging to the CW, reading the demodulated data to form the second predetermined number of CB data in the buffer space includes reading the demodulated data belonging to the CW in the buffer region corresponding to the CW. The present disclosure saves memory space of the baseband chip.