Baseband LSI Time Sharing for Application Processor Synchronization

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Solution Overview

Problem

In portable phones with videophone functions, synchronization between the baseband LSI and application processor is challenging due to frequency variations and drifts in clock signals, leading to buffer overflow and disrupted data reception.

Innovation Solution

The baseband LSI detects frequency drifts and shares time information with the application processor, allowing the application processor to correct its timer and synchronize with the baseband LSI, using either a clock signal, timer signal, or binary code, ensuring both processors operate in sync without reducing performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the application processor generates an internal clock by multiplying the clock from the radiofrequency LSI, then the baseband LSI and application processor can be synchronized, but the CPU must operate at a frequency lower than maximum and performance cannot be satisfactorily exerted

Engineering Contradiction:
Improvesynchronization between baseband LSI and application processorVSAvoidperformance of application processor
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces time information as an intermediary signal that is fed from the baseband LSI to the application processor. This time information serves as a mediator that allows the application processor to synchronize its timer with the baseband LSI without being constrained by the radiofrequency LSI's clock frequency, thereby resolving the contradiction between synchronization reliability and processor performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the application processor uses its own oscillator for clock generation, then the processor can operate at maximum frequency, but the baseband LSI and application processor cannot be synchronized due to frequency drift and variation

Engineering Contradiction:
Improveperformance of application processorVSAvoidsynchronization between baseband LSI and application processor
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the application processor receives time information from the baseband LSI and uses this feedback to correct its own timer. This feedback loop enables the application processor to maintain synchronization with the baseband LSI while independently operating at its maximum clock frequency, thus resolving the contradiction between productivity and reliability.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If data is transmitted between portable devices with different clock frequencies, then communication can occur, but the buffer overflows after a long period of time and normal reception state cannot be maintained

Engineering Contradiction:
Improvedata transmission between devices with different clocksVSAvoidsustained normal reception state
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by having the application processor continuously receive and apply time information from the baseband LSI before buffer overflow occurs. This proactive synchronization prevents the accumulation of timing differences that would otherwise lead to buffer overflow and reception failures, thereby maintaining reliable data transmission over extended periods.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7444168B2Radio communication semiconductor integrated circuit, data processing semiconductor integrated circuit and portable device
Publication Date: 2008.10.28 RENESAS ELECTRONICS CORP
  • US7444168B2 patent drawing
  • US7444168B2 patent drawing
  • US7444168B2 patent drawing

AI summary

A portable device having a communication function composed of a plurality of LSIs operated in synchronization with a clock, such as a baseband LSI and a logic LSI such as an application processor, can synchronize the baseband LSI with the logic LSI without lowering the performance of the logic LSI.