Baseband Receiver Gain and ADC Bit Control for Lower Power
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Solution Overview
Problem
Current millimeter-wave radio communication devices face challenges in reducing power consumption of analog/digital converters without compromising sampling rates, as power consumption is proportional to the sampling rate and number of bits for signal quantization.
Innovation Solution
A radio receiving device is designed with a frequency converting circuit, frequency characteristic correcting circuit, filter circuit, analog/digital conversion circuit, digital signal processing circuit, and controller that adjusts gain, frequency characteristics, and number of bits to reduce the number of bits required for analog/digital conversion, thereby lowering power consumption without reducing the sampling rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the sampling rate of the analog/digital converter is increased to process millimeter-wave high-frequency signals, then the signal processing capability is improved, but the power consumption of the analog/digital converter increases
Solution Approach 1:
The invention applies preliminary action by performing frequency characteristic correction and gain adjustment before the analog/digital conversion stage. The frequency characteristic correcting circuit corrects the frequency characteristics of the baseband signal prior to conversion, and the gain adjusting circuit adjusts the signal level, thereby preparing the signal in advance to reduce the number of bits required for quantization in the analog/digital converter, ultimately reducing power consumption while maintaining sampling rate
2Measurement precision
If the number of bits for analog signal quantization is increased to improve signal processing accuracy, then the signal processing precision is improved, but the power consumption of the analog/digital converter increases
Solution Approach 1:
The frequency characteristic correcting circuit and gain adjusting circuit perform preliminary signal conditioning before analog/digital conversion. By correcting frequency characteristics and optimizing gain, the signal is prepared such that fewer quantization bits are needed in the analog/digital converter to achieve the required signal processing precision, thereby reducing power consumption
Solution Approach 2:
The invention changes parameters by dynamically adjusting the number of bits for quantization based on signal conditions. The controller adjusts quantization parameters according to the corrected frequency characteristics and gain settings, optimizing the balance between signal processing precision and power consumption by using fewer bits when signal quality is sufficient
3Use of energy by moving object
If frequency characteristic correction is performed to reduce the number of bits for the analog/digital converter, then power consumption is reduced, but the device complexity increases
Solution Approach 1:
The invention segments the signal processing function into distinct modules: a frequency converting circuit for downconversion, a frequency characteristic correcting circuit for frequency response correction, a gain adjusting circuit for level optimization, and an analog/digital converter. This segmentation allows each module to perform its specific function efficiently, reducing the overall bit requirement for conversion while keeping each segment's complexity manageable
Solution Approach 2:
The frequency characteristic correcting circuit and gain adjusting circuit act as intermediary components between the frequency converting circuit and the analog/digital converter. These intermediary circuits condition the baseband signal by correcting frequency characteristics and optimizing gain, thereby reducing the quantization burden on the analog/digital converter and reducing power consumption without requiring complex changes to the converter itself
Data Source
AI summary
A gain controller sets a gain code indicating an optimum gain, a cutoff frequency code indicating a cutoff frequency, and a number of bits code indicating a number of bits. An AEQ/VGA gain controller sets a frequency characteristic code indicating a frequency characteristic, a gain code indicating a gain after correction, and a number of bits code indicating a number of bits. An AEQ/VGA amplifies a baseband received signal on the basis of a gain code and corrects a frequency characteristic of the baseband received signal on the basis of a frequency characteristic code. An HPF cuts off a band below a cutoff frequency of an output signal from the AEQ/VGA on the basis of a cutoff frequency code. An ADC quantizes an output signal from the HPF using a number of bits based on a number of bits code and generates a digital received signal.