Baseband Receiver Circuit With Switched-Capacitor Anti-Aliasing
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Solution Overview
Problem
Existing baseband receiver architectures face challenges in maintaining temperature stability and dynamic range as technology nodes scale down, requiring frequent calibration and struggling with aliasing effects, especially in IoT applications.
Innovation Solution
A novel receiver circuit design incorporating a first stage with a passive down-sampling filter and a second stage with a switched-capacitor circuit, utilizing a switched-capacitor circuit to reduce power consumption and achieve low sampling rates suitable for IoT devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If continuous time analogue filtering is used with analogue components, then filtering performance is achieved, but temperature stability deteriorates requiring frequent calibration
Solution Approach 1:
The patent replaces continuous-time analogue filtering (mechanical/electrical system with resistors and capacitors) with discrete-time switched-capacitor filtering. This substitution eliminates temperature-dependent analogue components while maintaining filtering performance through digital signal processing techniques, thereby improving temperature stability without sacrificing filtering effectiveness.
Solution Approach 2:
The patent changes the operating parameters from continuous-time analogue domain to discrete-time domain with switched-capacitor circuits. By sampling and processing signals at discrete time intervals, the system achieves temperature insensitivity because the filtering characteristics are determined by switching timing and capacitor ratios rather than temperature-varying resistance values, thus resolving the temperature stability issue.
2Volume of moving object
If technology nodes scale down, then device size is reduced, but dynamic range deteriorates and calibration frequency increases
Solution Approach 1:
The patent replaces traditional analogue filtering approaches with discrete-time switched-capacitor filtering, which maintains dynamic range performance even at scaled technology nodes. The switched-capacitor implementation uses digital timing control and capacitor-based filtering that is less sensitive to process variations and scaling effects, thereby preserving reliability and dynamic range while enabling smaller device fabrication.
3Measurement precision
If conventional baseband architectures are used, then basic filtering is achieved, but aliasing effects increase
Solution Approach 1:
The patent implements anti-aliasing filtering as a preliminary action before signal digitization and processing. The discrete-time filter is configured to pre-process the input signal and attenuate frequency components that would cause aliasing, thereby preventing harmful aliasing effects before they can corrupt the signal. This proactive approach maintains filtering capability while eliminating the harmful aliasing artifacts.
Data Source
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AI summary
A receiver path circuit (500) comprising a first stage (210), a down-sampler (212) and a second stage (214). The first stage (210) is configured to: filter a mixer-output-signal (211) received from a mixer; and provide a first-stage-output-signal (213). The down-sampler (217) is configured to: down-sample the first-stage-output-signal (213) to provide a transition-signal (215) having a transition-frequency, wherein the transition-frequency is a lower than the frequency of the first-stage-output-signal (213). The second stage (214), which comprises a switched-capacitor circuit that is configured to: filter and reduce the frequency of the transition-signal (215) in order to provide a second-stage-output-signal (216) to an ADC.